drivers/usb/chipidea/bits.h

Source file repositories/reference/linux-study-clean/drivers/usb/chipidea/bits.h

File Facts

System
Linux kernel
Corpus path
drivers/usb/chipidea/bits.h
Extension
.h
Size
4390 bytes
Lines
148
Domain
Driver Families
Bucket
drivers/usb
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DRIVERS_USB_CHIPIDEA_BITS_H
#define __DRIVERS_USB_CHIPIDEA_BITS_H

#include <linux/usb/ehci_def.h>

/*
 * ID
 * For 1.x revision, bit24 - bit31 are reserved
 * For 2.x revision, bit25 - bit28 are 0x2
 */
#define TAG		      (0x1F << 16)
#define REVISION	      (0xF << 21)
#define VERSION		      (0xF << 25)
#define CIVERSION	      (0x7 << 29)

/* SBUSCFG */
#define AHBBRST_MASK		0x7

/* HCCPARAMS */
#define HCCPARAMS_LEN         BIT(17)

/* DCCPARAMS */
#define DCCPARAMS_DEN         (0x1F << 0)
#define DCCPARAMS_DC          BIT(7)
#define DCCPARAMS_HC          BIT(8)

/* TESTMODE */
#define TESTMODE_FORCE        BIT(0)

/* USBCMD */
#define USBCMD_RS             BIT(0)
#define USBCMD_RST            BIT(1)
#define USBCMD_SUTW           BIT(13)
#define USBCMD_ATDTW          BIT(14)

/* USBSTS & USBINTR */
#define USBi_UI               BIT(0)
#define USBi_UEI              BIT(1)
#define USBi_PCI              BIT(2)
#define USBi_URI              BIT(6)
#define USBi_SLI              BIT(8)

/* DEVICEADDR */
#define DEVICEADDR_USBADRA    BIT(24)
#define DEVICEADDR_USBADR     (0x7FUL << 25)

/* TTCTRL */
#define TTCTRL_TTHA_MASK	(0x7fUL << 24)
/* Set non-zero value for internal TT Hub address representation */
#define TTCTRL_TTHA		(0x7fUL << 24)

/* BURSTSIZE */
#define RX_BURST_MASK		0xff
#define TX_BURST_MASK		0xff00

/* PORTSC */
#define PORTSC_CCS            BIT(0)
#define PORTSC_CSC            BIT(1)
#define PORTSC_PEC            BIT(3)
#define PORTSC_OCC            BIT(5)
#define PORTSC_FPR            BIT(6)
#define PORTSC_SUSP           BIT(7)
#define PORTSC_HSP            BIT(9)
#define PORTSC_PP             BIT(12)
#define PORTSC_PTC            (0x0FUL << 16)
#define PORTSC_WKCN           BIT(20)
#define PORTSC_PHCD(d)	      ((d) ? BIT(22) : BIT(23))
/* PTS and PTW for non lpm version only */
#define PORTSC_PFSC           BIT(24)
#define PORTSC_PTS(d)						\
	(u32)((((d) & 0x3) << 30) | (((d) & 0x4) ? BIT(25) : 0))
#define PORTSC_PTW            BIT(28)
#define PORTSC_STS            BIT(29)

#define PORTSC_W1C_BITS						\
	(PORTSC_CSC | PORTSC_PEC | PORTSC_OCC)

/* DEVLC */
#define DEVLC_PFSC            BIT(23)
#define DEVLC_PSPD            (0x03UL << 25)
#define DEVLC_PSPD_HS         (0x02UL << 25)
#define DEVLC_PTW             BIT(27)
#define DEVLC_STS             BIT(28)
#define DEVLC_PTS(d)          (u32)(((d) & 0x7) << 29)

/* Encoding for DEVLC_PTS and PORTSC_PTS */
#define PTS_UTMI              0
#define PTS_ULPI              2
#define PTS_SERIAL            3
#define PTS_HSIC              4

Annotation

Implementation Notes