drivers/usb/dwc3/dwc3-meson-g12a.c
Source file repositories/reference/linux-study-clean/drivers/usb/dwc3/dwc3-meson-g12a.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/usb/dwc3/dwc3-meson-g12a.c- Extension
.c- Size
- 26227 bytes
- Lines
- 986
- Domain
- Driver Families
- Bucket
- drivers/usb
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/kernel.hlinux/platform_device.hlinux/clk.hlinux/of.hlinux/of_platform.hlinux/pm_runtime.hlinux/regmap.hlinux/bitfield.hlinux/bitops.hlinux/reset.hlinux/phy/phy.hlinux/usb/otg.hlinux/usb/role.hlinux/regulator/consumer.h
Detected Declarations
struct dwc3_meson_g12astruct dwc3_meson_g12a_drvdatastruct dwc3_meson_g12afunction dwc3_meson_gxl_set_phy_modefunction dwc3_meson_gxl_usb2_init_phyfunction dwc3_meson_g12a_set_phy_modefunction dwc3_meson_g12a_usb2_init_phyfunction dwc3_meson_g12a_usb2_initfunction dwc3_meson_g12a_usb3_initfunction dwc3_meson_g12a_usb_otg_apply_modefunction dwc3_meson_g12a_usb_init_gluefunction dwc3_meson_g12a_get_physfunction dwc3_meson_g12a_get_idfunction dwc3_meson_g12a_otg_mode_setfunction dwc3_meson_g12a_role_setfunction dwc3_meson_g12a_role_getfunction dwc3_meson_g12a_irq_threadfunction dwc3_meson_g12a_otg_initfunction dwc3_meson_gxl_setup_regmapsfunction dwc3_meson_g12a_setup_regmapsfunction dwc3_meson_g12a_usb_initfunction dwc3_meson_gxl_usb_initfunction dwc3_meson_gxl_usb_post_initfunction dwc3_meson_g12a_probefunction dwc3_meson_g12a_removefunction dwc3_meson_g12a_runtime_suspendfunction dwc3_meson_g12a_runtime_resumefunction dwc3_meson_g12a_suspendfunction dwc3_meson_g12a_resume
Annotated Snippet
struct dwc3_meson_g12a_drvdata {
bool otg_phy_host_port_disable;
struct clk_bulk_data *clks;
int num_clks;
const char * const *phy_names;
int num_phys;
int (*setup_regmaps)(struct dwc3_meson_g12a *priv, void __iomem *base);
int (*usb2_init_phy)(struct dwc3_meson_g12a *priv, int i,
enum phy_mode mode);
int (*set_phy_mode)(struct dwc3_meson_g12a *priv, int i,
enum phy_mode mode);
int (*usb_init)(struct dwc3_meson_g12a *priv);
int (*usb_post_init)(struct dwc3_meson_g12a *priv);
};
static int dwc3_meson_gxl_setup_regmaps(struct dwc3_meson_g12a *priv,
void __iomem *base);
static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv,
void __iomem *base);
static int dwc3_meson_g12a_usb2_init_phy(struct dwc3_meson_g12a *priv, int i,
enum phy_mode mode);
static int dwc3_meson_gxl_usb2_init_phy(struct dwc3_meson_g12a *priv, int i,
enum phy_mode mode);
static int dwc3_meson_g12a_set_phy_mode(struct dwc3_meson_g12a *priv,
int i, enum phy_mode mode);
static int dwc3_meson_gxl_set_phy_mode(struct dwc3_meson_g12a *priv,
int i, enum phy_mode mode);
static int dwc3_meson_g12a_usb_init(struct dwc3_meson_g12a *priv);
static int dwc3_meson_gxl_usb_init(struct dwc3_meson_g12a *priv);
static int dwc3_meson_gxl_usb_post_init(struct dwc3_meson_g12a *priv);
/*
* For GXL and GXM SoCs:
* USB Phy muxing between the DWC2 Device controller and the DWC3 Host
* controller is buggy when switching from Device to Host when USB port
* is unpopulated, it causes the DWC3 to hard crash.
* When populated (including OTG switching with ID pin), the switch works
* like a charm like on the G12A platforms.
* In order to still switch from Host to Device on an USB Type-A port,
* an U2_PORT_DISABLE bit has been added to disconnect the DWC3 Host
* controller from the port, but when used the DWC3 controller must be
* reset to recover usage of the port.
*/
static const struct dwc3_meson_g12a_drvdata gxl_drvdata = {
.otg_phy_host_port_disable = true,
.clks = meson_gxl_clocks,
.num_clks = ARRAY_SIZE(meson_g12a_clocks),
.phy_names = meson_a1_phy_names,
.num_phys = ARRAY_SIZE(meson_a1_phy_names),
.setup_regmaps = dwc3_meson_gxl_setup_regmaps,
.usb2_init_phy = dwc3_meson_gxl_usb2_init_phy,
.set_phy_mode = dwc3_meson_gxl_set_phy_mode,
.usb_init = dwc3_meson_gxl_usb_init,
.usb_post_init = dwc3_meson_gxl_usb_post_init,
};
static const struct dwc3_meson_g12a_drvdata gxm_drvdata = {
.otg_phy_host_port_disable = true,
.clks = meson_gxl_clocks,
.num_clks = ARRAY_SIZE(meson_g12a_clocks),
.phy_names = meson_gxm_phy_names,
.num_phys = ARRAY_SIZE(meson_gxm_phy_names),
.setup_regmaps = dwc3_meson_gxl_setup_regmaps,
.usb2_init_phy = dwc3_meson_gxl_usb2_init_phy,
.set_phy_mode = dwc3_meson_gxl_set_phy_mode,
.usb_init = dwc3_meson_gxl_usb_init,
.usb_post_init = dwc3_meson_gxl_usb_post_init,
};
static const struct dwc3_meson_g12a_drvdata axg_drvdata = {
.clks = meson_gxl_clocks,
.num_clks = ARRAY_SIZE(meson_gxl_clocks),
.phy_names = meson_a1_phy_names,
.num_phys = ARRAY_SIZE(meson_a1_phy_names),
.setup_regmaps = dwc3_meson_gxl_setup_regmaps,
.usb2_init_phy = dwc3_meson_gxl_usb2_init_phy,
.set_phy_mode = dwc3_meson_gxl_set_phy_mode,
.usb_init = dwc3_meson_g12a_usb_init,
.usb_post_init = dwc3_meson_gxl_usb_post_init,
};
static const struct dwc3_meson_g12a_drvdata g12a_drvdata = {
.clks = meson_g12a_clocks,
.num_clks = ARRAY_SIZE(meson_g12a_clocks),
.phy_names = meson_g12a_phy_names,
Annotation
- Immediate include surface: `linux/module.h`, `linux/kernel.h`, `linux/platform_device.h`, `linux/clk.h`, `linux/of.h`, `linux/of_platform.h`, `linux/pm_runtime.h`, `linux/regmap.h`.
- Detected declarations: `struct dwc3_meson_g12a`, `struct dwc3_meson_g12a_drvdata`, `struct dwc3_meson_g12a`, `function dwc3_meson_gxl_set_phy_mode`, `function dwc3_meson_gxl_usb2_init_phy`, `function dwc3_meson_g12a_set_phy_mode`, `function dwc3_meson_g12a_usb2_init_phy`, `function dwc3_meson_g12a_usb2_init`, `function dwc3_meson_g12a_usb3_init`, `function dwc3_meson_g12a_usb_otg_apply_mode`.
- Atlas domain: Driver Families / drivers/usb.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.