drivers/usb/dwc3/dwc3-omap.c
Source file repositories/reference/linux-study-clean/drivers/usb/dwc3/dwc3-omap.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/usb/dwc3/dwc3-omap.c- Extension
.c- Size
- 15907 bytes
- Lines
- 627
- Domain
- Driver Families
- Bucket
- drivers/usb
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/kernel.hlinux/slab.hlinux/irq.hlinux/interrupt.hlinux/platform_device.hlinux/pm_runtime.hlinux/dma-mapping.hlinux/ioport.hlinux/io.hlinux/of.hlinux/of_platform.hlinux/extcon.hlinux/regulator/consumer.hlinux/usb/otg.h
Detected Declarations
struct dwc3_omapenum dwc3_omap_utmi_modeenum omap_dwc3_vbus_id_statusfunction dwc3_omap_readlfunction dwc3_omap_writelfunction dwc3_omap_read_utmi_ctrlfunction dwc3_omap_write_utmi_ctrlfunction dwc3_omap_read_irq0_statusfunction dwc3_omap_write_irq0_statusfunction dwc3_omap_read_irqmisc_statusfunction dwc3_omap_write_irqmisc_statusfunction dwc3_omap_write_irqmisc_setfunction dwc3_omap_write_irq0_setfunction dwc3_omap_write_irqmisc_clrfunction dwc3_omap_write_irq0_clrfunction dwc3_omap_set_mailboxfunction dwc3_omap_interruptfunction dwc3_omap_interrupt_threadfunction dwc3_omap_enable_irqsfunction dwc3_omap_disable_irqsfunction dwc3_omap_id_notifierfunction dwc3_omap_vbus_notifierfunction dwc3_omap_map_offsetfunction OMAP5function dwc3_omap_set_utmi_modefunction dwc3_omap_extcon_registerfunction dwc3_omap_probefunction dwc3_omap_removefunction dwc3_omap_suspendfunction dwc3_omap_resumefunction dwc3_omap_complete
Annotated Snippet
struct dwc3_omap {
struct device *dev;
int irq;
void __iomem *base;
u32 utmi_otg_ctrl;
u32 utmi_otg_offset;
u32 irqmisc_offset;
u32 irq_eoi_offset;
u32 debug_offset;
u32 irq0_offset;
struct extcon_dev *edev;
struct notifier_block vbus_nb;
struct notifier_block id_nb;
struct regulator *vbus_reg;
};
enum omap_dwc3_vbus_id_status {
OMAP_DWC3_ID_FLOAT,
OMAP_DWC3_ID_GROUND,
OMAP_DWC3_VBUS_OFF,
OMAP_DWC3_VBUS_VALID,
};
static inline u32 dwc3_omap_readl(void __iomem *base, u32 offset)
{
return readl(base + offset);
}
static inline void dwc3_omap_writel(void __iomem *base, u32 offset, u32 value)
{
writel(value, base + offset);
}
static u32 dwc3_omap_read_utmi_ctrl(struct dwc3_omap *omap)
{
return dwc3_omap_readl(omap->base, USBOTGSS_UTMI_OTG_CTRL +
omap->utmi_otg_offset);
}
static void dwc3_omap_write_utmi_ctrl(struct dwc3_omap *omap, u32 value)
{
dwc3_omap_writel(omap->base, USBOTGSS_UTMI_OTG_CTRL +
omap->utmi_otg_offset, value);
}
static u32 dwc3_omap_read_irq0_status(struct dwc3_omap *omap)
{
return dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_RAW_0 -
omap->irq0_offset);
}
static void dwc3_omap_write_irq0_status(struct dwc3_omap *omap, u32 value)
{
dwc3_omap_writel(omap->base, USBOTGSS_IRQSTATUS_0 -
omap->irq0_offset, value);
}
static u32 dwc3_omap_read_irqmisc_status(struct dwc3_omap *omap)
{
return dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_RAW_MISC +
omap->irqmisc_offset);
}
static void dwc3_omap_write_irqmisc_status(struct dwc3_omap *omap, u32 value)
{
dwc3_omap_writel(omap->base, USBOTGSS_IRQSTATUS_MISC +
omap->irqmisc_offset, value);
}
static void dwc3_omap_write_irqmisc_set(struct dwc3_omap *omap, u32 value)
{
dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_SET_MISC +
omap->irqmisc_offset, value);
}
static void dwc3_omap_write_irq0_set(struct dwc3_omap *omap, u32 value)
{
dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_SET_0 -
omap->irq0_offset, value);
}
static void dwc3_omap_write_irqmisc_clr(struct dwc3_omap *omap, u32 value)
Annotation
- Immediate include surface: `linux/module.h`, `linux/kernel.h`, `linux/slab.h`, `linux/irq.h`, `linux/interrupt.h`, `linux/platform_device.h`, `linux/pm_runtime.h`, `linux/dma-mapping.h`.
- Detected declarations: `struct dwc3_omap`, `enum dwc3_omap_utmi_mode`, `enum omap_dwc3_vbus_id_status`, `function dwc3_omap_readl`, `function dwc3_omap_writel`, `function dwc3_omap_read_utmi_ctrl`, `function dwc3_omap_write_utmi_ctrl`, `function dwc3_omap_read_irq0_status`, `function dwc3_omap_write_irq0_status`, `function dwc3_omap_read_irqmisc_status`.
- Atlas domain: Driver Families / drivers/usb.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.