drivers/usb/gadget/udc/bdc/bdc_dbg.c
Source file repositories/reference/linux-study-clean/drivers/usb/gadget/udc/bdc/bdc_dbg.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/usb/gadget/udc/bdc/bdc_dbg.c- Extension
.c- Size
- 3302 bytes
- Lines
- 119
- Domain
- Driver Families
- Bucket
- drivers/usb
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
bdc.hbdc_dbg.h
Detected Declarations
function Copyrightfunction bdc_dump_epstsfunction bdc_dbg_srrfunction bdc_dbg_bd_list
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* bdc_dbg.c - BRCM BDC USB3.0 device controller debug functions
*
* Copyright (C) 2014 Broadcom Corporation
*
* Author: Ashwini Pahuja
*/
#include "bdc.h"
#include "bdc_dbg.h"
void bdc_dbg_regs(struct bdc *bdc)
{
u32 temp;
dev_vdbg(bdc->dev, "bdc->regs:%p\n", bdc->regs);
temp = bdc_readl(bdc->regs, BDC_BDCCFG0);
dev_vdbg(bdc->dev, "bdccfg0:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_BDCCFG1);
dev_vdbg(bdc->dev, "bdccfg1:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_BDCCAP0);
dev_vdbg(bdc->dev, "bdccap0:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_BDCCAP1);
dev_vdbg(bdc->dev, "bdccap1:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_USPC);
dev_vdbg(bdc->dev, "uspc:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_DVCSA);
dev_vdbg(bdc->dev, "dvcsa:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_DVCSB);
dev_vdbg(bdc->dev, "dvcsb:0x%x08\n", temp);
}
void bdc_dump_epsts(struct bdc *bdc)
{
u32 temp;
temp = bdc_readl(bdc->regs, BDC_EPSTS0);
dev_vdbg(bdc->dev, "BDC_EPSTS0:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS1);
dev_vdbg(bdc->dev, "BDC_EPSTS1:0x%x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS2);
dev_vdbg(bdc->dev, "BDC_EPSTS2:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS3);
dev_vdbg(bdc->dev, "BDC_EPSTS3:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS4);
dev_vdbg(bdc->dev, "BDC_EPSTS4:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS5);
dev_vdbg(bdc->dev, "BDC_EPSTS5:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS6);
dev_vdbg(bdc->dev, "BDC_EPSTS6:0x%08x\n", temp);
temp = bdc_readl(bdc->regs, BDC_EPSTS7);
dev_vdbg(bdc->dev, "BDC_EPSTS7:0x%08x\n", temp);
}
void bdc_dbg_srr(struct bdc *bdc, u32 srr_num)
{
struct bdc_sr *sr;
dma_addr_t addr;
int i;
sr = bdc->srr.sr_bds;
addr = bdc->srr.dma_addr;
dev_vdbg(bdc->dev, "%s sr:%p dqp_index:%d\n", __func__,
sr, bdc->srr.dqp_index);
for (i = 0; i < NUM_SR_ENTRIES; i++) {
sr = &bdc->srr.sr_bds[i];
dev_vdbg(bdc->dev, "%llx %08x %08x %08x %08x\n",
(unsigned long long)addr,
le32_to_cpu(sr->offset[0]),
le32_to_cpu(sr->offset[1]),
le32_to_cpu(sr->offset[2]),
le32_to_cpu(sr->offset[3]));
addr += sizeof(*sr);
}
}
void bdc_dbg_bd_list(struct bdc *bdc, struct bdc_ep *ep)
{
struct bd_list *bd_list = &ep->bd_list;
struct bd_table *bd_table;
struct bdc_bd *bd;
int tbi, bdi, gbdi;
Annotation
- Immediate include surface: `bdc.h`, `bdc_dbg.h`.
- Detected declarations: `function Copyright`, `function bdc_dump_epsts`, `function bdc_dbg_srr`, `function bdc_dbg_bd_list`.
- Atlas domain: Driver Families / drivers/usb.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.