drivers/usb/gadget/udc/renesas_usbf.c
Source file repositories/reference/linux-study-clean/drivers/usb/gadget/udc/renesas_usbf.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/usb/gadget/udc/renesas_usbf.c- Extension
.c- Size
- 89003 bytes
- Lines
- 3394
- Domain
- Driver Families
- Bucket
- drivers/usb
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/dma-mapping.hlinux/interrupt.hlinux/iopoll.hlinux/kernel.hlinux/kfifo.hlinux/mod_devicetable.hlinux/module.hlinux/platform_device.hlinux/pm_runtime.hlinux/types.hlinux/usb/composite.hlinux/usb/gadget.hlinux/usb/role.h
Detected Declarations
struct usbf_reqstruct usbf_epstruct usbf_udcstruct usbf_ep_infoenum usbf_ep0statefunction usbf_reg_readlfunction usbf_reg_writelfunction usbf_reg_bitsetfunction usbf_reg_bitclrfunction usbf_reg_clrsetfunction usbf_ep_reg_readlfunction usbf_ep_reg_read_repfunction usbf_ep_reg_writelfunction usbf_ep_reg_write_repfunction usbf_ep_reg_bitsetfunction usbf_ep_reg_bitclrfunction usbf_ep_reg_clrsetfunction usbf_ep_dma_reg_readlfunction usbf_ep_dma_reg_writelfunction usbf_ep_dma_reg_bitsetfunction usbf_ep_dma_reg_bitclrfunction usbf_ep0_send_nullfunction usbf_ep0_pio_infunction usbf_ep0_pio_outfunction usbf_ep0_fifo_flushfunction usbf_epn_send_nullfunction usbf_epn_send_residuefunction usbf_epn_pio_infunction usbf_epn_enable_in_end_intfunction usbf_epn_dma_infunction usbf_epn_recv_residuefunction usbf_epn_pio_outfunction usbf_epn_enable_out_end_intfunction usbf_epn_dma_out_send_dmafunction usbf_epn_dma_out_complete_dmafunction usbf_epn_dma_outfunction usbf_epn_dma_stopfunction usbf_epn_dma_abortfunction usbf_epn_fifo_flushfunction usbf_ep_req_donefunction usbf_ep_nukefunction usbf_ep_is_stalledfunction usbf_epn_start_queuefunction usbf_ep_process_queuefunction usbf_ep_stallfunction usbf_ep0_enablefunction usbf_epn_enablefunction usbf_ep_enable
Annotated Snippet
struct usbf_req {
struct usb_request req;
struct list_head queue;
unsigned int is_zero_sent : 1;
unsigned int is_mapped : 1;
enum {
USBF_XFER_START,
USBF_XFER_WAIT_DMA,
USBF_XFER_SEND_NULL,
USBF_XFER_WAIT_END,
USBF_XFER_WAIT_DMA_SHORT,
USBF_XFER_WAIT_BRIDGE,
} xfer_step;
size_t dma_size;
};
/* USB Endpoint */
struct usbf_ep {
struct usb_ep ep;
char name[32];
struct list_head queue;
unsigned int is_processing : 1;
unsigned int is_in : 1;
struct usbf_udc *udc;
void __iomem *regs;
void __iomem *dma_regs;
unsigned int id : 8;
unsigned int disabled : 1;
unsigned int is_wedged : 1;
unsigned int delayed_status : 1;
u32 status;
void (*bridge_on_dma_end)(struct usbf_ep *ep);
};
enum usbf_ep0state {
EP0_IDLE,
EP0_IN_DATA_PHASE,
EP0_OUT_DATA_PHASE,
EP0_OUT_STATUS_START_PHASE,
EP0_OUT_STATUS_PHASE,
EP0_OUT_STATUS_END_PHASE,
EP0_IN_STATUS_START_PHASE,
EP0_IN_STATUS_PHASE,
EP0_IN_STATUS_END_PHASE,
};
struct usbf_udc {
struct usb_gadget gadget;
struct usb_gadget_driver *driver;
struct device *dev;
void __iomem *regs;
spinlock_t lock;
bool is_remote_wakeup;
bool is_usb_suspended;
struct usbf_ep ep[USBF_NUM_ENDPOINTS];
/* for EP0 control messages */
enum usbf_ep0state ep0state;
struct usbf_req setup_reply;
u8 ep0_buf[USBF_EP0_MAX_PCKT_SIZE];
};
struct usbf_ep_info {
const char *name;
struct usb_ep_caps caps;
u16 base_addr;
unsigned int is_double : 1;
u16 maxpacket_limit;
};
#define USBF_SINGLE_BUFFER 0
#define USBF_DOUBLE_BUFFER 1
#define USBF_EP_INFO(_name, _caps, _base_addr, _is_double, _maxpacket_limit) \
{ \
.name = _name, \
.caps = _caps, \
.base_addr = _base_addr, \
.is_double = _is_double, \
.maxpacket_limit = _maxpacket_limit, \
}
/* This table is computed from the recommended values provided in the SOC
* datasheet. The buffer type (single/double) and the endpoint type cannot
* be changed. The mapping in internal RAM (base_addr and number of words)
* for each endpoints depends on the max packet size and the buffer type.
*/
static const struct usbf_ep_info usbf_ep_info[USBF_NUM_ENDPOINTS] = {
/* ep0: buf @0x0000 64 bytes, fixed 32 words */
[0] = USBF_EP_INFO("ep0-ctrl",
USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
USB_EP_CAPS_DIR_ALL),
Annotation
- Immediate include surface: `linux/delay.h`, `linux/dma-mapping.h`, `linux/interrupt.h`, `linux/iopoll.h`, `linux/kernel.h`, `linux/kfifo.h`, `linux/mod_devicetable.h`, `linux/module.h`.
- Detected declarations: `struct usbf_req`, `struct usbf_ep`, `struct usbf_udc`, `struct usbf_ep_info`, `enum usbf_ep0state`, `function usbf_reg_readl`, `function usbf_reg_writel`, `function usbf_reg_bitset`, `function usbf_reg_bitclr`, `function usbf_reg_clrset`.
- Atlas domain: Driver Families / drivers/usb.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.