drivers/usb/host/octeon-hcd.h

Source file repositories/reference/linux-study-clean/drivers/usb/host/octeon-hcd.h

File Facts

System
Linux kernel
Corpus path
drivers/usb/host/octeon-hcd.h
Extension
.h
Size
73475 bytes
Lines
1848
Domain
Driver Families
Bucket
drivers/usb
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cvmx_usbcx_gahbcfg_s {
		__BITFIELD_FIELD(u32 reserved_9_31	: 23,
		__BITFIELD_FIELD(u32 ptxfemplvl		: 1,
		__BITFIELD_FIELD(u32 nptxfemplvl	: 1,
		__BITFIELD_FIELD(u32 reserved_6_6	: 1,
		__BITFIELD_FIELD(u32 dmaen		: 1,
		__BITFIELD_FIELD(u32 hbstlen		: 4,
		__BITFIELD_FIELD(u32 glblintrmsk	: 1,
		;)))))))
	} s;
};

/**
 * cvmx_usbc#_ghwcfg3
 *
 * User HW Config3 Register (GHWCFG3)
 *
 * This register contains the configuration options of the O2P USB core.
 */
union cvmx_usbcx_ghwcfg3 {
	u32 u32;
	/**
	 * struct cvmx_usbcx_ghwcfg3_s
	 * @dfifodepth: DFIFO Depth (DfifoDepth)
	 *	This value is in terms of 32-bit words.
	 *	* Minimum value is 32
	 *	* Maximum value is 32768
	 * @ahbphysync: AHB and PHY Synchronous (AhbPhySync)
	 *	Indicates whether AHB and PHY clocks are synchronous to
	 *	each other.
	 *	* 1'b0: No
	 *	* 1'b1: Yes
	 *	This bit is tied to 1.
	 * @rsttype: Reset Style for Clocked always Blocks in RTL (RstType)
	 *	* 1'b0: Asynchronous reset is used in the core
	 *	* 1'b1: Synchronous reset is used in the core
	 * @optfeature: Optional Features Removed (OptFeature)
	 *	Indicates whether the User ID register, GPIO interface ports,
	 *	and SOF toggle and counter ports were removed for gate count
	 *	optimization.
	 * @vendor_control_interface_support: Vendor Control Interface Support
	 *	* 1'b0: Vendor Control Interface is not available on the core.
	 *	* 1'b1: Vendor Control Interface is available.
	 * @i2c_selection: I2C Selection
	 *	* 1'b0: I2C Interface is not available on the core.
	 *	* 1'b1: I2C Interface is available on the core.
	 * @otgen: OTG Function Enabled (OtgEn)
	 *	The application uses this bit to indicate the O2P USB core's
	 *	OTG capabilities.
	 *	* 1'b0: Not OTG capable
	 *	* 1'b1: OTG Capable
	 * @pktsizewidth: Width of Packet Size Counters (PktSizeWidth)
	 *	* 3'b000: 4 bits
	 *	* 3'b001: 5 bits
	 *	* 3'b010: 6 bits
	 *	* 3'b011: 7 bits
	 *	* 3'b100: 8 bits
	 *	* 3'b101: 9 bits
	 *	* 3'b110: 10 bits
	 *	* Others: Reserved
	 * @xfersizewidth: Width of Transfer Size Counters (XferSizeWidth)
	 *	* 4'b0000: 11 bits
	 *	* 4'b0001: 12 bits
	 *	- ...
	 *	* 4'b1000: 19 bits
	 *	* Others: Reserved
	 */
	struct cvmx_usbcx_ghwcfg3_s {
		__BITFIELD_FIELD(u32 dfifodepth				: 16,
		__BITFIELD_FIELD(u32 reserved_13_15			: 3,
		__BITFIELD_FIELD(u32 ahbphysync				: 1,
		__BITFIELD_FIELD(u32 rsttype				: 1,
		__BITFIELD_FIELD(u32 optfeature				: 1,
		__BITFIELD_FIELD(u32 vendor_control_interface_support	: 1,
		__BITFIELD_FIELD(u32 i2c_selection			: 1,
		__BITFIELD_FIELD(u32 otgen				: 1,
		__BITFIELD_FIELD(u32 pktsizewidth			: 3,
		__BITFIELD_FIELD(u32 xfersizewidth			: 4,
		;))))))))))
	} s;
};

/**
 * cvmx_usbc#_gintmsk
 *
 * Core Interrupt Mask Register (GINTMSK)
 *
 * This register works with the Core Interrupt register to interrupt the
 * application. When an interrupt bit is masked, the interrupt associated with
 * that bit will not be generated. However, the Core Interrupt (GINTSTS)

Annotation

Implementation Notes