drivers/usb/musb/tusb6010.c
Source file repositories/reference/linux-study-clean/drivers/usb/musb/tusb6010.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/usb/musb/tusb6010.c- Extension
.c- Size
- 35939 bytes
- Lines
- 1303
- Domain
- Driver Families
- Bucket
- drivers/usb
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/gpio/consumer.hlinux/delay.hlinux/module.hlinux/kernel.hlinux/errno.hlinux/err.hlinux/prefetch.hlinux/usb.hlinux/irq.hlinux/io.hlinux/iopoll.hlinux/device.hlinux/platform_device.hlinux/dma-mapping.hlinux/usb/usb_phy_generic.hmusb_core.h
Detected Declarations
struct tusb6010_gluefunction tusb_get_revisionfunction tusb_print_revisionfunction tusb_wbus_quirkfunction tusb_fifo_offsetfunction tusb_ep_offsetfunction tusb_ep_selectfunction tusb_readbfunction tusb_writebfunction tusb_fifo_write_unalignedfunction tusb_fifo_read_unalignedfunction tusb_write_fifofunction tusb_read_fifofunction tusb_draw_powerfunction tusb_set_clock_sourcefunction tusb_allow_idlefunction tusb_musb_vbus_statusfunction musb_do_idlefunction tusb_musb_try_idlefunction tusb_musb_set_vbusfunction tusb_musb_set_modefunction tusb_otg_intsfunction tusb_musb_interruptfunction tusb_musb_enablefunction tusb_musb_disablefunction tusb_setup_cpu_interfacefunction tusb_musb_startfunction tusb_musb_initfunction tusb_musb_exitfunction tusb_probefunction tusb_remove
Annotated Snippet
struct tusb6010_glue {
struct device *dev;
struct platform_device *musb;
struct platform_device *phy;
struct gpio_desc *enable;
struct gpio_desc *intpin;
};
static void tusb_musb_set_vbus(struct musb *musb, int is_on);
#define TUSB_REV_MAJOR(reg_val) ((reg_val >> 4) & 0xf)
#define TUSB_REV_MINOR(reg_val) (reg_val & 0xf)
/*
* Checks the revision. We need to use the DMA register as 3.0 does not
* have correct versions for TUSB_PRCM_REV or TUSB_INT_CTRL_REV.
*/
static u8 tusb_get_revision(struct musb *musb)
{
void __iomem *tbase = musb->ctrl_base;
u32 die_id;
u8 rev;
rev = musb_readl(tbase, TUSB_DMA_CTRL_REV) & 0xff;
if (TUSB_REV_MAJOR(rev) == 3) {
die_id = TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase,
TUSB_DIDR1_HI));
if (die_id >= TUSB_DIDR1_HI_REV_31)
rev |= 1;
}
return rev;
}
static void tusb_print_revision(struct musb *musb)
{
void __iomem *tbase = musb->ctrl_base;
u8 rev;
rev = musb->tusb_revision;
pr_info("tusb: %s%i.%i %s%i.%i %s%i.%i %s%i.%i %s%i %s%i.%i\n",
"prcm",
TUSB_REV_MAJOR(musb_readl(tbase, TUSB_PRCM_REV)),
TUSB_REV_MINOR(musb_readl(tbase, TUSB_PRCM_REV)),
"int",
TUSB_REV_MAJOR(musb_readl(tbase, TUSB_INT_CTRL_REV)),
TUSB_REV_MINOR(musb_readl(tbase, TUSB_INT_CTRL_REV)),
"gpio",
TUSB_REV_MAJOR(musb_readl(tbase, TUSB_GPIO_REV)),
TUSB_REV_MINOR(musb_readl(tbase, TUSB_GPIO_REV)),
"dma",
TUSB_REV_MAJOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)),
TUSB_REV_MINOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)),
"dieid",
TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase, TUSB_DIDR1_HI)),
"rev",
TUSB_REV_MAJOR(rev), TUSB_REV_MINOR(rev));
}
#define WBUS_QUIRK_MASK (TUSB_PHY_OTG_CTRL_TESTM2 | TUSB_PHY_OTG_CTRL_TESTM1 \
| TUSB_PHY_OTG_CTRL_TESTM0)
/*
* Workaround for spontaneous WBUS wake-up issue #2 for tusb3.0.
* Disables power detection in PHY for the duration of idle.
*/
static void tusb_wbus_quirk(struct musb *musb, int enabled)
{
void __iomem *tbase = musb->ctrl_base;
static u32 phy_otg_ctrl, phy_otg_ena;
u32 tmp;
if (enabled) {
phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
tmp = TUSB_PHY_OTG_CTRL_WRPROTECT
| phy_otg_ena | WBUS_QUIRK_MASK;
musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp);
tmp = phy_otg_ena & ~WBUS_QUIRK_MASK;
tmp |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_TESTM2;
musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp);
dev_dbg(musb->controller, "Enabled tusb wbus quirk ctrl %08x ena %08x\n",
musb_readl(tbase, TUSB_PHY_OTG_CTRL),
musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE));
} else if (musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)
& TUSB_PHY_OTG_CTRL_TESTM2) {
tmp = TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ctrl;
musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp);
tmp = TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ena;
Annotation
- Immediate include surface: `linux/gpio/consumer.h`, `linux/delay.h`, `linux/module.h`, `linux/kernel.h`, `linux/errno.h`, `linux/err.h`, `linux/prefetch.h`, `linux/usb.h`.
- Detected declarations: `struct tusb6010_glue`, `function tusb_get_revision`, `function tusb_print_revision`, `function tusb_wbus_quirk`, `function tusb_fifo_offset`, `function tusb_ep_offset`, `function tusb_ep_select`, `function tusb_readb`, `function tusb_writeb`, `function tusb_fifo_write_unaligned`.
- Atlas domain: Driver Families / drivers/usb.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.