drivers/video/fbdev/carminefb_regs.h

Source file repositories/reference/linux-study-clean/drivers/video/fbdev/carminefb_regs.h

File Facts

System: Linux kernel
Corpus path: drivers/video/fbdev/carminefb_regs.h
Extension: .h
Size: 6979 bytes
Lines: 161
Domain: Driver Families
Bucket: drivers/video
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _CARMINEFB_REGS_H
#define _CARMINEFB_REGS_H

#define CARMINE_OVERLAY_EXT_MODE	(0x00000002)
#define CARMINE_GRAPH_REG		(0x00000000)
#define CARMINE_DISP0_REG		(0x00100000)
#define CARMINE_DISP1_REG		(0x00140000)
#define CARMINE_WB_REG			(0x00180000)
#define CARMINE_DCTL_REG		(0x00300000)
#define CARMINE_CTL_REG			(0x00400000)
#define CARMINE_WINDOW_MODE		(0x00000001)
#define CARMINE_EXTEND_MODE		(CARMINE_WINDOW_MODE | \
					CARMINE_OVERLAY_EXT_MODE)
#define CARMINE_L0E			(1 << 16)
#define CARMINE_L2E			(1 << 18)
#define CARMINE_DEN			(1 << 31)

#define CARMINE_EXT_CMODE_DIRECT24_RGBA		(0xC0000000)
#define CARMINE_DCTL_REG_MODE_ADD		(0x00)
#define CARMINE_DCTL_REG_SETTIME1_EMODE		(0x04)
#define CARMINE_DCTL_REG_REFRESH_SETTIME2	(0x08)
#define CARMINE_DCTL_REG_RSV0_STATES		(0x0C)
#define CARMINE_DCTL_REG_RSV2_RSV1		(0x10)
#define CARMINE_DCTL_REG_DDRIF2_DDRIF1		(0x14)
#define CARMINE_DCTL_REG_IOCONT1_IOCONT0	(0x24)
#define CARMINE_DCTL_REG_STATES_MASK		(0x000F)
#define CARMINE_DCTL_INIT_WAIT_INTERVAL		(1)
#define CARMINE_DCTL_INIT_WAIT_LIMIT		(5000)
#define CARMINE_WB_REG_WBM_DEFAULT		(0x0001c020)
#define CARMINE_DISP_REG_L0RM			(0x1880)
#define CARMINE_DISP_REG_L0PX			(0x1884)
#define CARMINE_DISP_REG_L0PY			(0x1888)
#define CARMINE_DISP_REG_L2RM			(0x18A0)
#define CARMINE_DISP_REG_L2PX			(0x18A4)
#define CARMINE_DISP_REG_L2PY			(0x18A8)
#define CARMINE_DISP_REG_L3RM			(0x18B0)
#define CARMINE_DISP_REG_L3PX			(0x18B4)
#define CARMINE_DISP_REG_L3PY			(0x18B8)
#define CARMINE_DISP_REG_L4RM			(0x18C0)
#define CARMINE_DISP_REG_L4PX			(0x18C4)
#define CARMINE_DISP_REG_L4PY			(0x18C8)
#define CARMINE_DISP_REG_L5RM			(0x18D0)
#define CARMINE_DISP_REG_L5PX			(0x18D4)
#define CARMINE_DISP_REG_L5PY			(0x18D8)
#define CARMINE_DISP_REG_L6RM			(0x1924)
#define CARMINE_DISP_REG_L6PX			(0x1928)
#define CARMINE_DISP_REG_L6PY			(0x192C)
#define CARMINE_DISP_REG_L7RM			(0x1964)
#define CARMINE_DISP_REG_L7PX			(0x1968)
#define CARMINE_DISP_REG_L7PY			(0x196C)
#define CARMINE_WB_REG_WBM			(0x0004)
#define CARMINE_DISP_HTP_SHIFT			(16)
#define CARMINE_DISP_HDB_SHIFT			(16)
#define CARMINE_DISP_HSW_SHIFT			(16)
#define CARMINE_DISP_VSW_SHIFT			(24)
#define CARMINE_DISP_VTR_SHIFT			(16)
#define CARMINE_DISP_VDP_SHIFT			(16)
#define CARMINE_CURSOR_CUTZ_MASK		(0x00000100)
#define CARMINE_CURSOR0_PRIORITY_MASK		(0x00010000)
#define CARMINE_CURSOR1_PRIORITY_MASK		(0x00020000)
#define CARMINE_DISP_WIDTH_SHIFT		(16)
#define CARMINE_DISP_WIN_H_SHIFT		(16)
#define CARMINE_DISP_REG_H_TOTAL		(0x0004)
#define CARMINE_DISP_REG_H_PERIOD		(0x0008)
#define CARMINE_DISP_REG_V_H_W_H_POS		(0x000C)
#define CARMINE_DISP_REG_V_TOTAL		(0x0010)
#define CARMINE_DISP_REG_V_PERIOD_POS		(0x0014)
#define CARMINE_DISP_REG_L0_MODE_W_H		(0x0020)
#define CARMINE_DISP_REG_L0_ORG_ADR		(0x0024)
#define CARMINE_DISP_REG_L0_DISP_ADR		(0x0028)
#define CARMINE_DISP_REG_L0_DISP_POS		(0x002C)
#define CARMINE_DISP_REG_L1_WIDTH		(0x0030)
#define CARMINE_DISP_REG_L1_ORG_ADR		(0x0034)
#define CARMINE_DISP_REG_L2_MODE_W_H		(0x0040)
#define CARMINE_DISP_REG_L2_ORG_ADR1		(0x0044)
#define CARMINE_DISP_REG_L2_DISP_ADR1		(0x0048)
#define CARMINE_DISP_REG_L2_DISP_POS		(0x0054)
#define CARMINE_DISP_REG_L3_MODE_W_H		(0x0058)
#define CARMINE_DISP_REG_L3_ORG_ADR1		(0x005C)
#define CARMINE_DISP_REG_L3_DISP_ADR1		(0x0060)
#define CARMINE_DISP_REG_L3_DISP_POS		(0x006C)
#define CARMINE_DISP_REG_L4_MODE_W_H		(0x0070)
#define CARMINE_DISP_REG_L4_ORG_ADR1		(0x0074)
#define CARMINE_DISP_REG_L4_DISP_ADR1		(0x0078)
#define CARMINE_DISP_REG_L4_DISP_POS		(0x0084)
#define CARMINE_DISP_REG_L5_MODE_W_H		(0x0088)
#define CARMINE_DISP_REG_L5_ORG_ADR1		(0x008C)
#define CARMINE_DISP_REG_L5_DISP_ADR1		(0x0090)
#define CARMINE_DISP_REG_L5_DISP_POS		(0x009C)
#define CARMINE_DISP_REG_CURSOR_MODE		(0x00A0)

Annotation

Atlas domain: Driver Families / drivers/video.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.