drivers/video/fbdev/kyro/STG4000Reg.h
Source file repositories/reference/linux-study-clean/drivers/video/fbdev/kyro/STG4000Reg.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/video/fbdev/kyro/STG4000Reg.h- Extension
.h- Size
- 9201 bytes
- Lines
- 284
- Domain
- Driver Families
- Bucket
- drivers/video
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
asm/page.hasm/io.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _STG4000REG_H
#define _STG4000REG_H
#define DWFILL unsigned long :32
#define WFILL unsigned short :16
/*
* Macros that access memory mapped card registers in PCI space
* Add an appropriate section for your OS or processor architecture.
*/
#if defined(__KERNEL__)
#include <asm/page.h>
#include <asm/io.h>
#define STG_WRITE_REG(reg,data) (writel(data,&pSTGReg->reg))
#define STG_READ_REG(reg) (readl(&pSTGReg->reg))
#else
#define STG_WRITE_REG(reg,data) (pSTGReg->reg = data)
#define STG_READ_REG(reg) (pSTGReg->reg)
#endif /* __KERNEL__ */
#define SET_BIT(n) (1<<(n))
#define CLEAR_BIT(n) (tmp &= ~(1<<n))
#define CLEAR_BITS_FRM_TO(frm, to) \
{\
int i; \
for(i = frm; i<= to; i++) \
{ \
tmp &= ~(1<<i); \
} \
}
#define CLEAR_BIT_2(n) (usTemp &= ~(1<<n))
#define CLEAR_BITS_FRM_TO_2(frm, to) \
{\
int i; \
for(i = frm; i<= to; i++) \
{ \
usTemp &= ~(1<<i); \
} \
}
/* LUT select */
typedef enum _LUT_USES {
NO_LUT = 0, RESERVED, GRAPHICS, OVERLAY
} LUT_USES;
/* Primary surface pixel format select */
typedef enum _PIXEL_FORMAT {
_8BPP = 0, _15BPP, _16BPP, _24BPP, _32BPP
} PIXEL_FORMAT;
/* Overlay blending mode select */
typedef enum _BLEND_MODE {
GRAPHICS_MODE = 0, COLOR_KEY, PER_PIXEL_ALPHA, GLOBAL_ALPHA,
CK_PIXEL_ALPHA, CK_GLOBAL_ALPHA
} OVRL_BLEND_MODE;
/* Overlay Pixel format select */
typedef enum _OVRL_PIX_FORMAT {
UYVY, VYUY, YUYV, YVYU
} OVRL_PIX_FORMAT;
/* Register Table */
typedef struct {
/* 0h */
volatile u32 Thread0Enable; /* 0x0000 */
volatile u32 Thread1Enable; /* 0x0004 */
volatile u32 Thread0Recover; /* 0x0008 */
volatile u32 Thread1Recover; /* 0x000C */
volatile u32 Thread0Step; /* 0x0010 */
volatile u32 Thread1Step; /* 0x0014 */
volatile u32 VideoInStatus; /* 0x0018 */
volatile u32 Core2InSignStart; /* 0x001C */
volatile u32 Core1ResetVector; /* 0x0020 */
volatile u32 Core1ROMOffset; /* 0x0024 */
volatile u32 Core1ArbiterPriority; /* 0x0028 */
volatile u32 VideoInControl; /* 0x002C */
volatile u32 VideoInReg0CtrlA; /* 0x0030 */
volatile u32 VideoInReg0CtrlB; /* 0x0034 */
volatile u32 VideoInReg1CtrlA; /* 0x0038 */
volatile u32 VideoInReg1CtrlB; /* 0x003C */
volatile u32 Thread0Kicker; /* 0x0040 */
volatile u32 Core2InputSign; /* 0x0044 */
volatile u32 Thread0ProgCtr; /* 0x0048 */
volatile u32 Thread1ProgCtr; /* 0x004C */
volatile u32 Thread1Kicker; /* 0x0050 */
volatile u32 GPRegister1; /* 0x0054 */
volatile u32 GPRegister2; /* 0x0058 */
volatile u32 GPRegister3; /* 0x005C */
volatile u32 GPRegister4; /* 0x0060 */
Annotation
- Immediate include surface: `asm/page.h`, `asm/io.h`.
- Atlas domain: Driver Families / drivers/video.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.