drivers/video/fbdev/platinumfb.h
Source file repositories/reference/linux-study-clean/drivers/video/fbdev/platinumfb.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/video/fbdev/platinumfb.h- Extension
.h- Size
- 10455 bytes
- Lines
- 369
- Domain
- Driver Families
- Bucket
- drivers/video
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct cmap_regsstruct pregstruct platinum_regsstruct platinum_regvalsstruct vmode_attr
Annotated Snippet
struct cmap_regs {
unsigned char addr;
char pad1[15];
unsigned char d1;
char pad2[15];
unsigned char d2;
char pad3[15];
unsigned char lut;
char pad4[15];
};
/*
* Structure of the registers for the "platinum" display adaptor".
*/
struct preg { /* padded register */
unsigned r; /* notice this is 32 bits. */
char pad[12];
};
struct platinum_regs {
struct preg reg[128];
};
/*
* Register initialization tables for the platinum display.
*
* It seems that there are two different types of platinum display
* out there. Older ones use the values in clocksel[1], for which
* the formula for the clock frequency seems to be
* F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5))
* Newer ones use the values in clocksel[0], for which the formula
* seems to be
* F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5))
*/
struct platinum_regvals {
int fb_offset;
int pitch[3];
unsigned regs[26];
unsigned char offset[3];
unsigned char mode[3];
unsigned char dacula_ctrl[3];
unsigned char clock_params[2][2];
};
#define DIV2 0x20
#define DIV4 0x40
#define DIV8 0x60
#define DIV16 0x80
/* 1280x1024, 75Hz (20) */
static struct platinum_regvals platinum_reg_init_20 = {
0x5c00,
{ 1312, 2592, 2592 },
{ 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d,
0x5e, 0x19e, 0x1a4, 0x854, 0x852, 4, 9, 0x50,
0x850, 0x851 }, { 0x58, 0x5d, 0x5d },
{ 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 },
{{ 45, 3 }, { 66, 7 }}
};
/* 1280x960, 75Hz (19) */
static struct platinum_regvals platinum_reg_init_19 = {
0x5c00,
{ 1312, 2592, 2592 },
{ 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
0, 0xb2, 0xd2, 0x12, 0x1a3, 0x23, 0x28, 0x2d,
0x5c, 0x19c, 0x1a2, 0x7d0, 0x7ce, 4, 9, 0x4c,
0x7cc, 0x7cd }, { 0x56, 0x5b, 0x5b },
{ 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 },
{{ 42, 3 }, { 44, 5 }}
};
/* 1152x870, 75Hz (18) */
static struct platinum_regvals platinum_reg_init_18 = {
0x11b0,
{ 1184, 2336, 4640 },
{ 0xff0, 4, 0, 0, 0, 0, 0x38f, 0,
0, 0x294, 0x16c, 0x20, 0x2d7, 0x3f, 0x49, 0x53,
0x82, 0x2c2, 0x2d6, 0x726, 0x724, 4, 9, 0x52,
0x71e, 0x722 }, { 0x74, 0x7c, 0x81 },
{ 2, 0, 0xff }, { 0x11, 0x15, 0x19 },
{{ 26, 0 + DIV2 }, { 42, 6 }}
};
/* 1024x768, 75Hz (17) */
static struct platinum_regvals platinum_reg_init_17 = {
0x10b0,
{ 1056, 2080, 4128 },
{ 0xff0, 4, 0, 0, 0, 0, 0x320, 0,
Annotation
- Detected declarations: `struct cmap_regs`, `struct preg`, `struct platinum_regs`, `struct platinum_regvals`, `struct vmode_attr`.
- Atlas domain: Driver Families / drivers/video.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.