drivers/video/fbdev/wm8505fb_regs.h

Source file repositories/reference/linux-study-clean/drivers/video/fbdev/wm8505fb_regs.h

File Facts

System: Linux kernel
Corpus path: drivers/video/fbdev/wm8505fb_regs.h
Extension: .h
Size: 1757 bytes
Lines: 69
Domain: Driver Families
Bucket: drivers/video
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _WM8505FB_REGS_H
#define _WM8505FB_REGS_H

/*
 * Color space select register, default value 0x1c
 *   BIT0 GOVRH_DVO_YUV2RGB_ENABLE
 *   BIT1 GOVRH_VGA_YUV2RGB_ENABLE
 *   BIT2 GOVRH_RGB_MODE
 *   BIT3 GOVRH_DAC_CLKINV
 *   BIT4 GOVRH_BLANK_ZERO
 */
#define WMT_GOVR_COLORSPACE	0x1e4
/*
 * Another colorspace select register, default value 1
 *   BIT0 GOVRH_DVO_RGB
 *   BIT1 GOVRH_DVO_YUV422
 */
#define WMT_GOVR_COLORSPACE1	 0x30

#define WMT_GOVR_CONTRAST	0x1b8
#define WMT_GOVR_BRGHTNESS	0x1bc /* incompatible with RGB? */

/* Framubeffer address */
#define WMT_GOVR_FBADDR		 0x90
#define WMT_GOVR_FBADDR1	 0x94 /* UV offset in YUV mode */

/* Offset of visible window */
#define WMT_GOVR_XPAN		 0xa4
#define WMT_GOVR_YPAN		 0xa0

#define WMT_GOVR_XRES		 0x98
#define WMT_GOVR_XRES_VIRTUAL	 0x9c

#define WMT_GOVR_MIF_ENABLE	 0x80
#define WMT_GOVR_FHI		 0xa8
#define WMT_GOVR_REG_UPDATE	 0xe4

/*
 *   BIT0 GOVRH_DVO_OUTWIDTH
 *   BIT1 GOVRH_DVO_SYNC_POLAR
 *   BIT2 GOVRH_DVO_ENABLE
 */
#define WMT_GOVR_DVO_SET	0x148

/* Timing generator? */
#define WMT_GOVR_TG		0x100

/* Timings */
#define WMT_GOVR_TIMING_H_ALL	0x108
#define WMT_GOVR_TIMING_V_ALL	0x10c
#define WMT_GOVR_TIMING_V_START	0x110
#define WMT_GOVR_TIMING_V_END	0x114
#define WMT_GOVR_TIMING_H_START	0x118
#define WMT_GOVR_TIMING_H_END	0x11c
#define WMT_GOVR_TIMING_V_SYNC	0x128
#define WMT_GOVR_TIMING_H_SYNC	0x12c

#endif /* _WM8505FB_REGS_H */

Annotation

Atlas domain: Driver Families / drivers/video.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.