drivers/watchdog/rzn1_wdt.c
Source file repositories/reference/linux-study-clean/drivers/watchdog/rzn1_wdt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/watchdog/rzn1_wdt.c- Extension
.c- Size
- 4412 bytes
- Lines
- 163
- Domain
- Driver Families
- Bucket
- drivers/watchdog
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/interrupt.hlinux/kernel.hlinux/module.hlinux/of_address.hlinux/of_irq.hlinux/platform_device.hlinux/reboot.hlinux/watchdog.h
Detected Declarations
struct rzn1_watchdogfunction max_heart_beat_msfunction compute_reload_valuefunction rzn1_wdt_pingfunction rzn1_wdt_startfunction rzn1_wdt_probe
Annotated Snippet
struct rzn1_watchdog {
struct watchdog_device wdtdev;
void __iomem *base;
unsigned long clk_rate_khz;
};
static inline uint32_t max_heart_beat_ms(unsigned long clk_rate_khz)
{
return (RZN1_WDT_MAX * RZN1_WDT_PRESCALER) / clk_rate_khz;
}
static inline uint32_t compute_reload_value(uint32_t tick_ms,
unsigned long clk_rate_khz)
{
return (tick_ms * clk_rate_khz) / RZN1_WDT_PRESCALER;
}
static int rzn1_wdt_ping(struct watchdog_device *w)
{
struct rzn1_watchdog *wdt = watchdog_get_drvdata(w);
/* Any value retriggers the watchdog */
writel(0, wdt->base + RZN1_WDT_RETRIGGER);
return 0;
}
static int rzn1_wdt_start(struct watchdog_device *w)
{
struct rzn1_watchdog *wdt = watchdog_get_drvdata(w);
u32 val;
/*
* The hardware allows you to write to this reg only once.
* Since this includes the reload value, there is no way to change the
* timeout once started. Also note that the WDT clock is half the bus
* fabric clock rate, so if the bus fabric clock rate is changed after
* the WDT is started, the WDT interval will be wrong.
*/
val = RZN1_WDT_RETRIGGER_WDSI;
val |= RZN1_WDT_RETRIGGER_ENABLE;
val |= RZN1_WDT_RETRIGGER_PRESCALE;
val |= compute_reload_value(w->max_hw_heartbeat_ms, wdt->clk_rate_khz);
writel(val, wdt->base + RZN1_WDT_RETRIGGER);
return 0;
}
static struct watchdog_info rzn1_wdt_info = {
.identity = "RZ/N1 Watchdog",
.options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
};
static const struct watchdog_ops rzn1_wdt_ops = {
.owner = THIS_MODULE,
.start = rzn1_wdt_start,
.ping = rzn1_wdt_ping,
};
static int rzn1_wdt_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct rzn1_watchdog *wdt;
unsigned long clk_rate;
struct clk *clk;
int ret;
wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
if (!wdt)
return -ENOMEM;
wdt->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(wdt->base))
return PTR_ERR(wdt->base);
clk = devm_clk_get_enabled(dev, NULL);
if (IS_ERR(clk))
return dev_err_probe(dev, PTR_ERR(clk), "failed to get the clock\n");
clk_rate = clk_get_rate(clk);
if (!clk_rate)
return dev_err_probe(dev, -EINVAL, "failed to get the clock rate\n");
wdt->clk_rate_khz = clk_rate / 1000;
wdt->wdtdev.info = &rzn1_wdt_info;
wdt->wdtdev.ops = &rzn1_wdt_ops;
wdt->wdtdev.status = WATCHDOG_NOWAYOUT_INIT_STATUS;
wdt->wdtdev.parent = dev;
/*
* The period of the watchdog cannot be changed once set
Annotation
- Immediate include surface: `linux/clk.h`, `linux/interrupt.h`, `linux/kernel.h`, `linux/module.h`, `linux/of_address.h`, `linux/of_irq.h`, `linux/platform_device.h`, `linux/reboot.h`.
- Detected declarations: `struct rzn1_watchdog`, `function max_heart_beat_ms`, `function compute_reload_value`, `function rzn1_wdt_ping`, `function rzn1_wdt_start`, `function rzn1_wdt_probe`.
- Atlas domain: Driver Families / drivers/watchdog.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.