drivers/watchdog/tqmx86_wdt.c
Source file repositories/reference/linux-study-clean/drivers/watchdog/tqmx86_wdt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/watchdog/tqmx86_wdt.c- Extension
.c- Size
- 3014 bytes
- Lines
- 127
- Domain
- Driver Families
- Bucket
- drivers/watchdog
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/io.hlinux/log2.hlinux/module.hlinux/platform_device.hlinux/timer.hlinux/watchdog.h
Detected Declarations
struct tqmx86_wdtfunction tqmx86_wdt_startfunction tqmx86_wdt_set_timeoutfunction tqmx86_wdt_probe
Annotated Snippet
struct tqmx86_wdt {
struct watchdog_device wdd;
void __iomem *io_base;
};
#define TQMX86_WDCFG 0x00 /* Watchdog Configuration Register */
#define TQMX86_WDCS 0x01 /* Watchdog Config/Status Register */
static int tqmx86_wdt_start(struct watchdog_device *wdd)
{
struct tqmx86_wdt *priv = watchdog_get_drvdata(wdd);
iowrite8(0x81, priv->io_base + TQMX86_WDCS);
return 0;
}
static int tqmx86_wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
{
struct tqmx86_wdt *priv = watchdog_get_drvdata(wdd);
u8 val;
t = roundup_pow_of_two(t);
val = ilog2(t) | 0x90;
val += 3; /* values 0,1,2 correspond to 0.125,0.25,0.5s timeouts */
iowrite8(val, priv->io_base + TQMX86_WDCFG);
wdd->timeout = t;
return 0;
}
static const struct watchdog_info tqmx86_wdt_info = {
.options = WDIOF_SETTIMEOUT |
WDIOF_KEEPALIVEPING,
.identity = "TQMx86 Watchdog",
};
static const struct watchdog_ops tqmx86_wdt_ops = {
.owner = THIS_MODULE,
.start = tqmx86_wdt_start,
.set_timeout = tqmx86_wdt_set_timeout,
};
static int tqmx86_wdt_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct tqmx86_wdt *priv;
struct resource *res;
int err;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
if (!res)
return -ENODEV;
priv->io_base = devm_ioport_map(dev, res->start, resource_size(res));
if (!priv->io_base)
return -ENOMEM;
watchdog_set_drvdata(&priv->wdd, priv);
priv->wdd.parent = dev;
priv->wdd.info = &tqmx86_wdt_info;
priv->wdd.ops = &tqmx86_wdt_ops;
priv->wdd.min_timeout = 1;
priv->wdd.max_timeout = 4096;
priv->wdd.max_hw_heartbeat_ms = 4096*1000;
priv->wdd.timeout = WDT_TIMEOUT;
watchdog_init_timeout(&priv->wdd, timeout, dev);
watchdog_set_nowayout(&priv->wdd, WATCHDOG_NOWAYOUT);
tqmx86_wdt_set_timeout(&priv->wdd, priv->wdd.timeout);
err = devm_watchdog_register_device(dev, &priv->wdd);
if (err)
return err;
dev_info(dev, "TQMx86 watchdog\n");
return 0;
}
static struct platform_driver tqmx86_wdt_driver = {
.driver = {
.name = "tqmx86-wdt",
Annotation
- Immediate include surface: `linux/io.h`, `linux/log2.h`, `linux/module.h`, `linux/platform_device.h`, `linux/timer.h`, `linux/watchdog.h`.
- Detected declarations: `struct tqmx86_wdt`, `function tqmx86_wdt_start`, `function tqmx86_wdt_set_timeout`, `function tqmx86_wdt_probe`.
- Atlas domain: Driver Families / drivers/watchdog.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.