drivers/watchdog/xilinx_wwdt.c

Source file repositories/reference/linux-study-clean/drivers/watchdog/xilinx_wwdt.c

File Facts

System
Linux kernel
Corpus path
drivers/watchdog/xilinx_wwdt.c
Extension
.c
Size
7666 bytes
Lines
254
Domain
Driver Families
Bucket
drivers/watchdog
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct xwwdt_device {
	void __iomem *base;
	spinlock_t spinlock; /* spinlock for register handling */
	struct watchdog_device xilinx_wwdt_wdd;
	unsigned long freq;
	u32 close_percent;
	u64 closed_timeout;
	u64 open_timeout;
};

static int xilinx_wwdt_start(struct watchdog_device *wdd)
{
	struct xwwdt_device *xdev = watchdog_get_drvdata(wdd);
	struct watchdog_device *xilinx_wwdt_wdd = &xdev->xilinx_wwdt_wdd;
	u32 control_status_reg;

	spin_lock(&xdev->spinlock);

	iowrite32(XWWDT_MWR_MASK, xdev->base + XWWDT_MWR_OFFSET);
	iowrite32(~(u32)XWWDT_ESR_WEN_MASK, xdev->base + XWWDT_ESR_OFFSET);
	iowrite32((u32)xdev->closed_timeout, xdev->base + XWWDT_FWR_OFFSET);
	iowrite32((u32)xdev->open_timeout, xdev->base + XWWDT_SWR_OFFSET);

	/* Enable the window watchdog timer */
	control_status_reg = ioread32(xdev->base + XWWDT_ESR_OFFSET);
	control_status_reg |= XWWDT_ESR_WEN_MASK;
	iowrite32(control_status_reg, xdev->base + XWWDT_ESR_OFFSET);

	spin_unlock(&xdev->spinlock);

	dev_dbg(xilinx_wwdt_wdd->parent, "Watchdog Started!\n");

	return 0;
}

static int xilinx_wwdt_keepalive(struct watchdog_device *wdd)
{
	struct xwwdt_device *xdev = watchdog_get_drvdata(wdd);
	u32 control_status_reg;

	spin_lock(&xdev->spinlock);

	/* Enable write access control bit for the window watchdog */
	iowrite32(XWWDT_MWR_MASK, xdev->base + XWWDT_MWR_OFFSET);

	/* Trigger restart kick to watchdog */
	control_status_reg = ioread32(xdev->base + XWWDT_ESR_OFFSET);
	control_status_reg |= XWWDT_ESR_WSW_MASK;
	iowrite32(control_status_reg, xdev->base + XWWDT_ESR_OFFSET);

	spin_unlock(&xdev->spinlock);

	return 0;
}

static const struct watchdog_info xilinx_wwdt_ident = {
	.options = WDIOF_KEEPALIVEPING |
		WDIOF_SETTIMEOUT,
	.firmware_version = 1,
	.identity = "xlnx_window watchdog",
};

static const struct watchdog_ops xilinx_wwdt_ops = {
	.owner = THIS_MODULE,
	.start = xilinx_wwdt_start,
	.ping = xilinx_wwdt_keepalive,
};

static int xwwdt_probe(struct platform_device *pdev)
{
	struct watchdog_device *xilinx_wwdt_wdd;
	struct device *dev = &pdev->dev;
	struct xwwdt_device *xdev;
	u64 max_per_window_ms;
	u64 min_per_window_ms;
	u64 timeout_count;
	struct clk *clk;
	u32 timeout_ms;
	u64 ms_count;
	int ret;

	xdev = devm_kzalloc(dev, sizeof(*xdev), GFP_KERNEL);
	if (!xdev)
		return -ENOMEM;

	xilinx_wwdt_wdd = &xdev->xilinx_wwdt_wdd;
	xilinx_wwdt_wdd->info = &xilinx_wwdt_ident;
	xilinx_wwdt_wdd->ops = &xilinx_wwdt_ops;
	xilinx_wwdt_wdd->parent = dev;

Annotation

Implementation Notes