include/asm-generic/mcs_spinlock.h

File Facts

System

Linux kernel

Corpus path

include/asm-generic/mcs_spinlock.h

Extension

.h

Size

402 bytes

Lines

20

Domain

Repository Root And Misc

Bucket

include

Inferred role

Repository Root And Misc: implementation source

Status

source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

• Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct mcs_spinlock

Annotated Snippet

struct mcs_spinlock {
	struct mcs_spinlock *next;
	int locked; /* 1 if lock acquired */
	int count;  /* nesting count, see qspinlock.c */
};

/*
 * Architectures can define their own:
 *
 *   arch_mcs_spin_lock_contended(l)
 *   arch_mcs_spin_unlock_contended(l)
 *
 * See kernel/locking/mcs_spinlock.c.
 */

#endif /* __ASM_MCS_SPINLOCK_H */

Annotation

• Detected declarations: `struct mcs_spinlock`.
• Atlas domain: Repository Root And Misc / include.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.