include/drm/ttm/ttm_caching.h
Source file repositories/reference/linux-study-clean/include/drm/ttm/ttm_caching.h
File Facts
- System
- Linux kernel
- Corpus path
include/drm/ttm/ttm_caching.h- Extension
.h- Size
- 1843 bytes
- Lines
- 58
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
linux/pgtable.h
Detected Declarations
enum ttm_caching
Annotated Snippet
#ifndef _TTM_CACHING_H_
#define _TTM_CACHING_H_
#include <linux/pgtable.h>
#define TTM_NUM_CACHING_TYPES 3
/**
* enum ttm_caching - CPU caching and BUS snooping behavior.
*/
enum ttm_caching {
/**
* @ttm_uncached: Most defensive option for device mappings,
* don't even allow write combining.
*/
ttm_uncached,
/**
* @ttm_write_combined: Don't cache read accesses, but allow at least
* writes to be combined.
*/
ttm_write_combined,
/**
* @ttm_cached: Fully cached like normal system memory, requires that
* devices snoop the CPU cache on accesses.
*/
ttm_cached
};
pgprot_t ttm_prot_from_caching(enum ttm_caching caching, pgprot_t tmp);
#endif
Annotation
- Immediate include surface: `linux/pgtable.h`.
- Detected declarations: `enum ttm_caching`.
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.