include/dt-bindings/clock/cix,sky1.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/cix,sky1.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/cix,sky1.h
Extension
.h
Size
10085 bytes
Lines
280
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_CIX_SKY1_H
#define _DT_BINDINGS_CLK_CIX_SKY1_H

#define CLK_TREE_CPU_GICxCLK			0
#define CLK_TREE_CPU_PPUCLK			1
#define CLK_TREE_CPU_PERIPHCLK			2
#define CLK_TREE_DSU_CLK			3
#define CLK_TREE_DSU_PCLK			4
#define CLK_TREE_CPU_CLK_BC0			5
#define CLK_TREE_CPU_CLK_BC1			6
#define CLK_TREE_CPU_CLK_BC2			7
#define CLK_TREE_CPU_CLK_BC3			8
#define CLK_TREE_CPU_CLK_MC0			9
#define CLK_TREE_CPU_CLK_MC1			10
#define CLK_TREE_CPU_CLK_MC2			11
#define CLK_TREE_CPU_CLK_MC3			12
#define CLK_TREE_CPU_CLK_LC0			13
#define CLK_TREE_CPU_CLK_LC1			14
#define CLK_TREE_CPU_CLK_LC2			15
#define CLK_TREE_CPU_CLK_LC3			16
#define CLK_TREE_CSI_CTRL0_PCLK			17
#define CLK_TREE_CSI_CTRL1_PCLK			18
#define CLK_TREE_CSI_CTRL2_PCLK			19
#define CLK_TREE_CSI_CTRL3_PCLK			20
#define CLK_TREE_CSI_DMA0_PCLK			21
#define CLK_TREE_CSI_DMA1_PCLK			22
#define CLK_TREE_CSI_DMA2_PCLK			23
#define CLK_TREE_CSI_DMA3_PCLK			24
#define CLK_TREE_CSI_PHY0_PSM			25
#define CLK_TREE_CSI_PHY1_PSM			26
#define CLK_TREE_CSI_PHY0_APBCLK		27
#define CLK_TREE_CSI_PHY1_APBCLK		28
#define CLK_TREE_FCH_APB_CLK			29
#define CLK_TREE_GPU_CLK_400M			30
#define CLK_TREE_GPU_CLK_CORE			31
#define CLK_TREE_GPU_CLK_STACKS			32
#define CLK_TREE_DP0_PIXEL0			33
#define CLK_TREE_DP0_PIXEL1			34
#define CLK_TREE_DP1_PIXEL0			35
#define CLK_TREE_DP1_PIXEL1			36
#define CLK_TREE_DP2_PIXEL0			37
#define CLK_TREE_DP2_PIXEL1			38
#define CLK_TREE_DP3_PIXEL0			39
#define CLK_TREE_DP3_PIXEL1			40
#define CLK_TREE_DP4_PIXEL0			41
#define CLK_TREE_DP4_PIXEL1			42
#define CLK_TREE_DPU_CLK			43
#define CLK_TREE_DPU0_ACLK			44
#define CLK_TREE_DPU1_ACLK			45
#define CLK_TREE_DPU2_ACLK			46
#define CLK_TREE_DPU3_ACLK			47
#define CLK_TREE_DPU4_ACLK			48
#define CLK_TREE_DPC0_VIDCLK0			49
#define CLK_TREE_DPC0_VIDCLK1			50
#define CLK_TREE_DPC1_VIDCLK0			51
#define CLK_TREE_DPC1_VIDCLK1			52
#define CLK_TREE_DPC2_VIDCLK0			53
#define CLK_TREE_DPC2_VIDCLK1			54
#define CLK_TREE_DPC3_VIDCLK0			55
#define CLK_TREE_DPC3_VIDCLK1			56
#define CLK_TREE_DPC4_VIDCLK0			57
#define CLK_TREE_DPC4_VIDCLK1			58
#define CLK_TREE_DPC0_APBCLK			59
#define CLK_TREE_DPC1_APBCLK			60
#define CLK_TREE_DPC2_APBCLK			61
#define CLK_TREE_DPC3_APBCLK			62
#define CLK_TREE_DPC4_APBCLK			63
#define CLK_TREE_NPU_MEMCLK			64
#define CLK_TREE_NPU_SYSCLK			65
#define CLK_TREE_NPU_DBGCLK			66
#define CLK_TREE_VPU_APBCLK			67
#define CLK_TREE_ISP_ACLK			68
#define CLK_TREE_ISP_SCLK			69
#define CLK_TREE_AUDIO_CLK4			70
#define CLK_TREE_AUDIO_CLK5			71
#define CLK_TREE_CAMERA_MCLK0			72
#define CLK_TREE_CAMERA_MCLK1			73
#define CLK_TREE_CAMERA_MCLK2			74
#define CLK_TREE_CAMERA_MCLK3			75
#define CLK_TREE_AUDIO_CLK0			76
#define CLK_TREE_AUDIO_CLK1			77
#define CLK_TREE_AUDIO_CLK2			78
#define CLK_TREE_AUDIO_CLK3			79
#define CLK_TREE_MM_NI700_CLK			80
#define CLK_TREE_SYS_NI700_CLK			81
#define CLK_TREE_GMAC0_ACLK			82
#define CLK_TREE_GMAC1_ACLK			83
#define CLK_TREE_GMAC0_DIV_ACLK			84
#define CLK_TREE_GMAC0_DIV_TXCLK		85
#define CLK_TREE_GMAC0_RGMII0_TXCLK		86

Annotation

Implementation Notes