include/dt-bindings/clock/eswin,eic7700-clock.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/eswin,eic7700-clock.h

File Facts

System: Linux kernel
Corpus path: include/dt-bindings/clock/eswin,eic7700-clock.h
Extension: .h
Size: 12258 bytes
Lines: 286
Domain: Repository Root And Misc
Bucket: include
Inferred role: Repository Root And Misc: implementation source
Status: source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _DT_BINDINGS_ESWIN_EIC7700_CLOCK_H_
#define _DT_BINDINGS_ESWIN_EIC7700_CLOCK_H_

#define EIC7700_CLK_XTAL_32K				0
#define EIC7700_CLK_PLL_CPU				1
#define EIC7700_CLK_SPLL0_FOUT1				2
#define EIC7700_CLK_SPLL0_FOUT2				3
#define EIC7700_CLK_SPLL0_FOUT3				4
#define EIC7700_CLK_SPLL1_FOUT1				5
#define EIC7700_CLK_SPLL1_FOUT2				6
#define EIC7700_CLK_SPLL1_FOUT3				7
#define EIC7700_CLK_SPLL2_FOUT1				8
#define EIC7700_CLK_SPLL2_FOUT2				9
#define EIC7700_CLK_SPLL2_FOUT3				10
#define EIC7700_CLK_VPLL_FOUT1				11
#define EIC7700_CLK_VPLL_FOUT2				12
#define EIC7700_CLK_VPLL_FOUT3				13
#define EIC7700_CLK_APLL_FOUT1				14
#define EIC7700_CLK_APLL_FOUT2				15
#define EIC7700_CLK_APLL_FOUT3				16
#define EIC7700_CLK_EXT_MCLK				17
#define EIC7700_CLK_LPDDR_REF_BAK			18
#define EIC7700_CLK_MUX_CPU_ROOT_3MUX1_GFREE		19
#define EIC7700_CLK_MUX_CPU_ACLK_2MUX1_GFREE		20
#define EIC7700_CLK_MUX_DSP_ACLK_ROOT_2MUX1_GFREE	21
#define EIC7700_CLK_MUX_D2D_ACLK_ROOT_2MUX1_GFREE	22
#define EIC7700_CLK_MUX_MSHCORE_ROOT_3MUX1_0		23
#define EIC7700_CLK_MUX_MSHCORE_ROOT_3MUX1_1		24
#define EIC7700_CLK_MUX_MSHCORE_ROOT_3MUX1_2		25
#define EIC7700_CLK_MUX_NPU_LLCLK_3MUX1_GFREE		26
#define EIC7700_CLK_MUX_NPU_CORE_3MUX1_GFREE		27
#define EIC7700_CLK_MUX_VI_ACLK_ROOT_2MUX1_GFREE	28
#define EIC7700_CLK_MUX_VI_DVP_ROOT_2MUX1_GFREE		29
#define EIC7700_CLK_MUX_VI_DIG_ISP_ROOT_2MUX1_GFREE	30
#define EIC7700_CLK_MUX_VO_ACLK_ROOT_2MUX1_GFREE	31
#define EIC7700_CLK_MUX_VO_PIXEL_ROOT_2MUX1		32
#define EIC7700_CLK_MUX_VCDEC_ROOT_2MUX1_GFREE		33
#define EIC7700_CLK_MUX_VCACLK_ROOT_2MUX1_GFREE		34
#define EIC7700_CLK_MUX_SATA_PHY_2MUX1			35
#define EIC7700_CLK_MUX_BOOTSPI_CLK_2MUX1_GFREE		36
#define EIC7700_CLK_MUX_SCPU_CORE_CLK_2MUX1_GFREE	37
#define EIC7700_CLK_MUX_LPCPU_CORE_CLK_2MUX1_GFREE	38
#define EIC7700_CLK_MUX_VO_MCLK_2MUX_EXT_MCLK		39
#define EIC7700_CLK_MUX_SYSCFG_CLK_ROOT_2MUX1_GFREE	40
#define EIC7700_CLK_MUX_AONDMA_AXI2MUX1_GFREE		41
#define EIC7700_CLK_MUX_RMII_REF_2MUX			42
#define EIC7700_CLK_MUX_ETH_CORE_2MUX1			43
#define EIC7700_CLK_MUX_VI_DW_ROOT_2MUX1		44
#define EIC7700_CLK_MUX_NPU_E31_3MUX1_GFREE		45
#define EIC7700_CLK_MUX_DDR_ACLK_ROOT_2MUX1_GFREE	46
#define EIC7700_CLK_DIV_SYS_CFG_DYNM			47
#define EIC7700_CLK_DIV_NOC_NSP_DYNM			48
#define EIC7700_CLK_DIV_BOOTSPI_DYNM			49
#define EIC7700_CLK_DIV_SCPU_CORE_DYNM			50
#define EIC7700_CLK_DIV_LPCPU_CORE_DYNM			51
#define EIC7700_CLK_DIV_GPU_ACLK_DYNM			52
#define EIC7700_CLK_DIV_DSP_ACLK_DYNM			53
#define EIC7700_CLK_DIV_D2D_ACLK_DYNM			54
#define EIC7700_CLK_DIV_HSP_ACLK_DYNM			55
#define EIC7700_CLK_DIV_ETH_TXCLK_DYNM_0		56
#define EIC7700_CLK_DIV_ETH_TXCLK_DYNM_1		57
#define EIC7700_CLK_DIV_MSHC_CORE_DYNM_0		58
#define EIC7700_CLK_DIV_MSHC_CORE_DYNM_1		59
#define EIC7700_CLK_DIV_MSHC_CORE_DYNM_2		60
#define EIC7700_CLK_DIV_PCIE_ACLK_DYNM			61
#define EIC7700_CLK_DIV_NPU_ACLK_DYNM			62
#define EIC7700_CLK_DIV_NPU_LLC_SRC0_DYNM		63
#define EIC7700_CLK_DIV_NPU_LLC_SRC1_DYNM		64
#define EIC7700_CLK_DIV_NPU_CORECLK_DYNM		65
#define EIC7700_CLK_DIV_VI_ACLK_DYNM			66
#define EIC7700_CLK_DIV_VI_DVP_DYNM			67
#define EIC7700_CLK_DIV_VI_DIG_ISP_DYNM			68
#define EIC7700_CLK_DIV_VI_SHUTTER_DYNM_0		69
#define EIC7700_CLK_DIV_VI_SHUTTER_DYNM_1		70
#define EIC7700_CLK_DIV_VI_SHUTTER_DYNM_2		71
#define EIC7700_CLK_DIV_VI_SHUTTER_DYNM_3		72
#define EIC7700_CLK_DIV_VI_SHUTTER_DYNM_4		73
#define EIC7700_CLK_DIV_VI_SHUTTER_DYNM_5		74
#define EIC7700_CLK_DIV_VO_ACLK_DYNM			75
#define EIC7700_CLK_DIV_IESMCLK_DYNM			76
#define EIC7700_CLK_DIV_VO_PIXEL_DYNM			77
#define EIC7700_CLK_DIV_VO_MCLK_DYNM			78
#define EIC7700_CLK_DIV_VC_ACLK_DYNM			79
#define EIC7700_CLK_DIV_JD_DYNM				80
#define EIC7700_CLK_DIV_JE_DYNM				81
#define EIC7700_CLK_DIV_VE_DYNM				82
#define EIC7700_CLK_DIV_VD_DYNM				83
#define EIC7700_CLK_DIV_G2D_DYNM			84
#define EIC7700_CLK_DIV_AONDMA_AXI_DYNM			85
#define EIC7700_CLK_DIV_CRYPTO_DYNM			86

Annotation

Atlas domain: Repository Root And Misc / include.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.