include/dt-bindings/clock/exynos850.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/exynos850.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/exynos850.h
Extension
.h
Size
12311 bytes
Lines
396
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLOCK_EXYNOS_850_H
#define _DT_BINDINGS_CLOCK_EXYNOS_850_H

/* CMU_TOP */
#define CLK_FOUT_SHARED0_PLL		1
#define CLK_FOUT_SHARED1_PLL		2
#define CLK_FOUT_MMC_PLL		3
#define CLK_MOUT_SHARED0_PLL		4
#define CLK_MOUT_SHARED1_PLL		5
#define CLK_MOUT_MMC_PLL		6
#define CLK_MOUT_CORE_BUS		7
#define CLK_MOUT_CORE_CCI		8
#define CLK_MOUT_CORE_MMC_EMBD		9
#define CLK_MOUT_CORE_SSS		10
#define CLK_MOUT_DPU			11
#define CLK_MOUT_HSI_BUS		12
#define CLK_MOUT_HSI_MMC_CARD		13
#define CLK_MOUT_HSI_USB20DRD		14
#define CLK_MOUT_PERI_BUS		15
#define CLK_MOUT_PERI_UART		16
#define CLK_MOUT_PERI_IP		17
#define CLK_DOUT_SHARED0_DIV3		18
#define CLK_DOUT_SHARED0_DIV2		19
#define CLK_DOUT_SHARED1_DIV3		20
#define CLK_DOUT_SHARED1_DIV2		21
#define CLK_DOUT_SHARED0_DIV4		22
#define CLK_DOUT_SHARED1_DIV4		23
#define CLK_DOUT_CORE_BUS		24
#define CLK_DOUT_CORE_CCI		25
#define CLK_DOUT_CORE_MMC_EMBD		26
#define CLK_DOUT_CORE_SSS		27
#define CLK_DOUT_DPU			28
#define CLK_DOUT_HSI_BUS		29
#define CLK_DOUT_HSI_MMC_CARD		30
#define CLK_DOUT_HSI_USB20DRD		31
#define CLK_DOUT_PERI_BUS		32
#define CLK_DOUT_PERI_UART		33
#define CLK_DOUT_PERI_IP		34
#define CLK_GOUT_CORE_BUS		35
#define CLK_GOUT_CORE_CCI		36
#define CLK_GOUT_CORE_MMC_EMBD		37
#define CLK_GOUT_CORE_SSS		38
#define CLK_GOUT_DPU			39
#define CLK_GOUT_HSI_BUS		40
#define CLK_GOUT_HSI_MMC_CARD		41
#define CLK_GOUT_HSI_USB20DRD		42
#define CLK_GOUT_PERI_BUS		43
#define CLK_GOUT_PERI_UART		44
#define CLK_GOUT_PERI_IP		45
#define CLK_MOUT_CLKCMU_APM_BUS		46
#define CLK_DOUT_CLKCMU_APM_BUS		47
#define CLK_GOUT_CLKCMU_APM_BUS		48
#define CLK_MOUT_AUD			49
#define CLK_GOUT_AUD			50
#define CLK_DOUT_AUD			51
#define CLK_MOUT_IS_BUS			52
#define CLK_MOUT_IS_ITP			53
#define CLK_MOUT_IS_VRA			54
#define CLK_MOUT_IS_GDC			55
#define CLK_GOUT_IS_BUS			56
#define CLK_GOUT_IS_ITP			57
#define CLK_GOUT_IS_VRA			58
#define CLK_GOUT_IS_GDC			59
#define CLK_DOUT_IS_BUS			60
#define CLK_DOUT_IS_ITP			61
#define CLK_DOUT_IS_VRA			62
#define CLK_DOUT_IS_GDC			63
#define CLK_MOUT_MFCMSCL_MFC		64
#define CLK_MOUT_MFCMSCL_M2M		65
#define CLK_MOUT_MFCMSCL_MCSC		66
#define CLK_MOUT_MFCMSCL_JPEG		67
#define CLK_GOUT_MFCMSCL_MFC		68
#define CLK_GOUT_MFCMSCL_M2M		69
#define CLK_GOUT_MFCMSCL_MCSC		70
#define CLK_GOUT_MFCMSCL_JPEG		71
#define CLK_DOUT_MFCMSCL_MFC		72
#define CLK_DOUT_MFCMSCL_M2M		73
#define CLK_DOUT_MFCMSCL_MCSC		74
#define CLK_DOUT_MFCMSCL_JPEG		75
#define CLK_MOUT_G3D_SWITCH		76
#define CLK_GOUT_G3D_SWITCH		77
#define CLK_DOUT_G3D_SWITCH		78
#define CLK_MOUT_CPUCL0_DBG		79
#define CLK_MOUT_CPUCL0_SWITCH		80
#define CLK_GOUT_CPUCL0_DBG		81
#define CLK_GOUT_CPUCL0_SWITCH		82
#define CLK_DOUT_CPUCL0_DBG		83
#define CLK_DOUT_CPUCL0_SWITCH		84
#define CLK_MOUT_CPUCL1_DBG		85
#define CLK_MOUT_CPUCL1_SWITCH		86

Annotation

Implementation Notes