include/dt-bindings/clock/google,gs101.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/google,gs101.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/google,gs101.h
Extension
.h
Size
27084 bytes
Lines
674
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLOCK_GOOGLE_GS101_H
#define _DT_BINDINGS_CLOCK_GOOGLE_GS101_H

/* CMU_TOP PLL */
#define CLK_FOUT_SHARED0_PLL		1
#define CLK_FOUT_SHARED1_PLL		2
#define CLK_FOUT_SHARED2_PLL		3
#define CLK_FOUT_SHARED3_PLL		4
#define CLK_FOUT_SPARE_PLL		5

/* CMU_TOP MUX */
#define CLK_MOUT_PLL_SHARED0		6
#define CLK_MOUT_PLL_SHARED1		7
#define CLK_MOUT_PLL_SHARED2		8
#define CLK_MOUT_PLL_SHARED3		9
#define CLK_MOUT_PLL_SPARE		10
#define CLK_MOUT_CMU_BO_BUS		11
#define CLK_MOUT_CMU_BUS0_BUS		12
#define CLK_MOUT_CMU_BUS1_BUS		13
#define CLK_MOUT_CMU_BUS2_BUS		14
#define CLK_MOUT_CMU_CIS_CLK0		15
#define CLK_MOUT_CMU_CIS_CLK1		16
#define CLK_MOUT_CMU_CIS_CLK2		17
#define CLK_MOUT_CMU_CIS_CLK3		18
#define CLK_MOUT_CMU_CIS_CLK4		19
#define CLK_MOUT_CMU_CIS_CLK5		20
#define CLK_MOUT_CMU_CIS_CLK6		21
#define CLK_MOUT_CMU_CIS_CLK7		22
#define CLK_MOUT_CMU_CMU_BOOST		23
#define CLK_MOUT_CMU_BOOST_OPTION1	24
#define CLK_MOUT_CMU_CORE_BUS		25
#define CLK_MOUT_CMU_CPUCL0_DBG		26
#define CLK_MOUT_CMU_CPUCL0_SWITCH	27
#define CLK_MOUT_CMU_CPUCL1_SWITCH	28
#define CLK_MOUT_CMU_CPUCL2_SWITCH	29
#define CLK_MOUT_CMU_CSIS_BUS		30
#define CLK_MOUT_CMU_DISP_BUS		31
#define CLK_MOUT_CMU_DNS_BUS		32
#define CLK_MOUT_CMU_DPU_BUS		33
#define CLK_MOUT_CMU_EH_BUS		34
#define CLK_MOUT_CMU_G2D_G2D		35
#define CLK_MOUT_CMU_G2D_MSCL		36
#define CLK_MOUT_CMU_G3AA_G3AA		37
#define CLK_MOUT_CMU_G3D_BUSD		38
#define CLK_MOUT_CMU_G3D_GLB		39
#define CLK_MOUT_CMU_G3D_SWITCH		40
#define CLK_MOUT_CMU_GDC_GDC0		41
#define CLK_MOUT_CMU_GDC_GDC1		42
#define CLK_MOUT_CMU_GDC_SCSC		43
#define CLK_MOUT_CMU_HPM		44
#define CLK_MOUT_CMU_HSI0_BUS		45
#define CLK_MOUT_CMU_HSI0_DPGTC		46
#define CLK_MOUT_CMU_HSI0_USB31DRD	47
#define CLK_MOUT_CMU_HSI0_USBDPDBG	48
#define CLK_MOUT_CMU_HSI1_BUS		49
#define CLK_MOUT_CMU_HSI1_PCIE		50
#define CLK_MOUT_CMU_HSI2_BUS		51
#define CLK_MOUT_CMU_HSI2_MMC_CARD	52
#define CLK_MOUT_CMU_HSI2_PCIE		53
#define CLK_MOUT_CMU_HSI2_UFS_EMBD	54
#define CLK_MOUT_CMU_IPP_BUS		55
#define CLK_MOUT_CMU_ITP_BUS		56
#define CLK_MOUT_CMU_MCSC_ITSC		57
#define CLK_MOUT_CMU_MCSC_MCSC		58
#define CLK_MOUT_CMU_MFC_MFC		59
#define CLK_MOUT_CMU_MIF_BUSP		60
#define CLK_MOUT_CMU_MIF_SWITCH		61
#define CLK_MOUT_CMU_MISC_BUS		62
#define CLK_MOUT_CMU_MISC_SSS		63
#define CLK_MOUT_CMU_PDP_BUS		64
#define CLK_MOUT_CMU_PDP_VRA		65
#define CLK_MOUT_CMU_PERIC0_BUS		66
#define CLK_MOUT_CMU_PERIC0_IP		67
#define CLK_MOUT_CMU_PERIC1_BUS		68
#define CLK_MOUT_CMU_PERIC1_IP		69
#define CLK_MOUT_CMU_TNR_BUS		70
#define CLK_MOUT_CMU_TOP_BOOST_OPTION1	71
#define CLK_MOUT_CMU_TOP_CMUREF		72
#define CLK_MOUT_CMU_TPU_BUS		73
#define CLK_MOUT_CMU_TPU_TPU		74
#define CLK_MOUT_CMU_TPU_TPUCTL		75
#define CLK_MOUT_CMU_TPU_UART		76
#define CLK_MOUT_CMU_CMUREF		77

/* CMU_TOP Dividers */
#define CLK_DOUT_CMU_BO_BUS		78
#define CLK_DOUT_CMU_BUS0_BUS		79
#define CLK_DOUT_CMU_BUS1_BUS		80
#define CLK_DOUT_CMU_BUS2_BUS		81
#define CLK_DOUT_CMU_CIS_CLK0		82

Annotation

Implementation Notes