include/dt-bindings/clock/hi3660-clock.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/hi3660-clock.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/hi3660-clock.h
Extension
.h
Size
6747 bytes
Lines
215
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DTS_HI3660_CLOCK_H
#define __DTS_HI3660_CLOCK_H

/* fixed rate clocks */
#define HI3660_CLKIN_SYS		0
#define HI3660_CLKIN_REF		1
#define HI3660_CLK_FLL_SRC		2
#define HI3660_CLK_PPLL0		3
#define HI3660_CLK_PPLL1		4
#define HI3660_CLK_PPLL2		5
#define HI3660_CLK_PPLL3		6
#define HI3660_CLK_SCPLL		7
#define HI3660_PCLK			8
#define HI3660_CLK_UART0_DBG		9
#define HI3660_CLK_UART6		10
#define HI3660_OSC32K			11
#define HI3660_OSC19M			12
#define HI3660_CLK_480M			13
#define HI3660_CLK_INV			14

/* clk in crgctrl */
#define HI3660_FACTOR_UART3		15
#define HI3660_CLK_FACTOR_MMC		16
#define HI3660_CLK_GATE_I2C0		17
#define HI3660_CLK_GATE_I2C1		18
#define HI3660_CLK_GATE_I2C2		19
#define HI3660_CLK_GATE_I2C6		20
#define HI3660_CLK_DIV_SYSBUS		21
#define HI3660_CLK_DIV_320M		22
#define HI3660_CLK_DIV_A53		23
#define HI3660_CLK_GATE_SPI0		24
#define HI3660_CLK_GATE_SPI2		25
#define HI3660_PCIEPHY_REF		26
#define HI3660_CLK_ABB_USB		27
#define HI3660_HCLK_GATE_SDIO0		28
#define HI3660_HCLK_GATE_SD		29
#define HI3660_CLK_GATE_AOMM		30
#define HI3660_PCLK_GPIO0		31
#define HI3660_PCLK_GPIO1		32
#define HI3660_PCLK_GPIO2		33
#define HI3660_PCLK_GPIO3		34
#define HI3660_PCLK_GPIO4		35
#define HI3660_PCLK_GPIO5		36
#define HI3660_PCLK_GPIO6		37
#define HI3660_PCLK_GPIO7		38
#define HI3660_PCLK_GPIO8		39
#define HI3660_PCLK_GPIO9		40
#define HI3660_PCLK_GPIO10		41
#define HI3660_PCLK_GPIO11		42
#define HI3660_PCLK_GPIO12		43
#define HI3660_PCLK_GPIO13		44
#define HI3660_PCLK_GPIO14		45
#define HI3660_PCLK_GPIO15		46
#define HI3660_PCLK_GPIO16		47
#define HI3660_PCLK_GPIO17		48
#define HI3660_PCLK_GPIO18		49
#define HI3660_PCLK_GPIO19		50
#define HI3660_PCLK_GPIO20		51
#define HI3660_PCLK_GPIO21		52
#define HI3660_CLK_GATE_SPI3		53
#define HI3660_CLK_GATE_I2C7		54
#define HI3660_CLK_GATE_I2C3		55
#define HI3660_CLK_GATE_SPI1		56
#define HI3660_CLK_GATE_UART1		57
#define HI3660_CLK_GATE_UART2		58
#define HI3660_CLK_GATE_UART4		59
#define HI3660_CLK_GATE_UART5		60
#define HI3660_CLK_GATE_I2C4		61
#define HI3660_CLK_GATE_DMAC		62
#define HI3660_PCLK_GATE_DSS		63
#define HI3660_ACLK_GATE_DSS		64
#define HI3660_CLK_GATE_LDI1		65
#define HI3660_CLK_GATE_LDI0		66
#define HI3660_CLK_GATE_VIVOBUS		67
#define HI3660_CLK_GATE_EDC0		68
#define HI3660_CLK_GATE_TXDPHY0_CFG	69
#define HI3660_CLK_GATE_TXDPHY0_REF	70
#define HI3660_CLK_GATE_TXDPHY1_CFG	71
#define HI3660_CLK_GATE_TXDPHY1_REF	72
#define HI3660_ACLK_GATE_USB3OTG	73
#define HI3660_CLK_GATE_SPI4		74
#define HI3660_CLK_GATE_SD		75
#define HI3660_CLK_GATE_SDIO0		76
#define HI3660_CLK_GATE_UFS_SUBSYS	77
#define HI3660_PCLK_GATE_DSI0		78
#define HI3660_PCLK_GATE_DSI1		79
#define HI3660_ACLK_GATE_PCIE		80
#define HI3660_PCLK_GATE_PCIE_SYS       81
#define HI3660_CLK_GATE_PCIEAUX		82
#define HI3660_PCLK_GATE_PCIE_PHY	83

Annotation

Implementation Notes