include/dt-bindings/clock/intel,lgm-clk.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/intel,lgm-clk.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/intel,lgm-clk.h- Extension
.h- Size
- 3837 bytes
- Lines
- 166
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __INTEL_LGM_CLK_H
#define __INTEL_LGM_CLK_H
/* PLL clocks */
#define LGM_CLK_OSC 1
#define LGM_CLK_PLLPP 2
#define LGM_CLK_PLL2 3
#define LGM_CLK_PLL0CZ 4
#define LGM_CLK_PLL0B 5
#define LGM_CLK_PLL1 6
#define LGM_CLK_LJPLL3 7
#define LGM_CLK_LJPLL4 8
#define LGM_CLK_PLL0CM0 9
#define LGM_CLK_PLL0CM1 10
/* clocks from PLLs */
/* ROPLL clocks */
#define LGM_CLK_PP_HW 15
#define LGM_CLK_PP_UC 16
#define LGM_CLK_PP_FXD 17
#define LGM_CLK_PP_TBM 18
/* PLL2 clocks */
#define LGM_CLK_DDR 20
/* PLL0CZ */
#define LGM_CLK_CM 25
#define LGM_CLK_IC 26
#define LGM_CLK_SDXC3 27
/* PLL0B */
#define LGM_CLK_NGI 30
#define LGM_CLK_NOC4 31
#define LGM_CLK_SW 32
#define LGM_CLK_QSPI 33
#define LGM_CLK_CQEM LGM_CLK_SW
#define LGM_CLK_EMMC5 LGM_CLK_NOC4
/* PLL1 */
#define LGM_CLK_CT 35
#define LGM_CLK_DSP 36
#define LGM_CLK_VIF 37
/* LJPLL3 */
#define LGM_CLK_CML 40
#define LGM_CLK_SERDES 41
#define LGM_CLK_POOL 42
#define LGM_CLK_PTP 43
/* LJPLL4 */
#define LGM_CLK_PCIE 45
#define LGM_CLK_SATA LGM_CLK_PCIE
/* PLL0CM0 */
#define LGM_CLK_CPU0 50
/* PLL0CM1 */
#define LGM_CLK_CPU1 55
/* Miscellaneous clocks */
#define LGM_CLK_EMMC4 60
#define LGM_CLK_SDXC2 61
#define LGM_CLK_EMMC 62
#define LGM_CLK_SDXC 63
#define LGM_CLK_SLIC 64
#define LGM_CLK_DCL 65
#define LGM_CLK_DOCSIS 66
#define LGM_CLK_PCM 67
#define LGM_CLK_DDR_PHY 68
#define LGM_CLK_PONDEF 69
#define LGM_CLK_PL25M 70
#define LGM_CLK_PL10M 71
#define LGM_CLK_PL1544K 72
#define LGM_CLK_PL2048K 73
#define LGM_CLK_PL8K 74
#define LGM_CLK_PON_NTR 75
#define LGM_CLK_SYNC0 76
#define LGM_CLK_SYNC1 77
#define LGM_CLK_PROGDIV 78
#define LGM_CLK_OD0 79
#define LGM_CLK_OD1 80
#define LGM_CLK_CBPHY0 81
#define LGM_CLK_CBPHY1 82
#define LGM_CLK_CBPHY2 83
#define LGM_CLK_CBPHY3 84
/* Gate clocks */
/* Gate CLK0 */
#define LGM_GCLK_C55 100
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.