include/dt-bindings/clock/mediatek,mt7981-clk.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/mediatek,mt7981-clk.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/mediatek,mt7981-clk.h
Extension
.h
Size
6329 bytes
Lines
216
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_MT7981_H
#define _DT_BINDINGS_CLK_MT7981_H

/* TOPCKGEN */
#define CLK_TOP_CB_CKSQ_40M		0
#define CLK_TOP_CB_M_416M		1
#define CLK_TOP_CB_M_D2			2
#define CLK_TOP_CB_M_D3			3
#define CLK_TOP_M_D3_D2			4
#define CLK_TOP_CB_M_D4			5
#define CLK_TOP_CB_M_D8			6
#define CLK_TOP_M_D8_D2			7
#define CLK_TOP_CB_MM_720M		8
#define CLK_TOP_CB_MM_D2		9
#define CLK_TOP_CB_MM_D3		10
#define CLK_TOP_CB_MM_D3_D5		11
#define CLK_TOP_CB_MM_D4		12
#define CLK_TOP_CB_MM_D6		13
#define CLK_TOP_MM_D6_D2		14
#define CLK_TOP_CB_MM_D8		15
#define CLK_TOP_CB_APLL2_196M		16
#define CLK_TOP_APLL2_D2		17
#define CLK_TOP_APLL2_D4		18
#define CLK_TOP_NET1_2500M		19
#define CLK_TOP_CB_NET1_D4		20
#define CLK_TOP_CB_NET1_D5		21
#define CLK_TOP_NET1_D5_D2		22
#define CLK_TOP_NET1_D5_D4		23
#define CLK_TOP_CB_NET1_D8		24
#define CLK_TOP_NET1_D8_D2		25
#define CLK_TOP_NET1_D8_D4		26
#define CLK_TOP_CB_NET2_800M		27
#define CLK_TOP_CB_NET2_D2		28
#define CLK_TOP_CB_NET2_D4		29
#define CLK_TOP_NET2_D4_D2		30
#define CLK_TOP_NET2_D4_D4		31
#define CLK_TOP_CB_NET2_D6		32
#define CLK_TOP_CB_WEDMCU_208M		33
#define CLK_TOP_CB_SGM_325M		34
#define CLK_TOP_CKSQ_40M_D2		35
#define CLK_TOP_CB_RTC_32K		36
#define CLK_TOP_CB_RTC_32P7K		37
#define CLK_TOP_USB_TX250M		38
#define CLK_TOP_FAUD			39
#define CLK_TOP_NFI1X			40
#define CLK_TOP_USB_EQ_RX250M		41
#define CLK_TOP_USB_CDR_CK		42
#define CLK_TOP_USB_LN0_CK		43
#define CLK_TOP_SPINFI_BCK		44
#define CLK_TOP_SPI			45
#define CLK_TOP_SPIM_MST		46
#define CLK_TOP_UART_BCK		47
#define CLK_TOP_PWM_BCK			48
#define CLK_TOP_I2C_BCK			49
#define CLK_TOP_PEXTP_TL		50
#define CLK_TOP_EMMC_208M		51
#define CLK_TOP_EMMC_400M		52
#define CLK_TOP_DRAMC_REF		53
#define CLK_TOP_DRAMC_MD32		54
#define CLK_TOP_SYSAXI			55
#define CLK_TOP_SYSAPB			56
#define CLK_TOP_ARM_DB_MAIN		57
#define CLK_TOP_AP2CNN_HOST		58
#define CLK_TOP_NETSYS			59
#define CLK_TOP_NETSYS_500M		60
#define CLK_TOP_NETSYS_WED_MCU		61
#define CLK_TOP_NETSYS_2X		62
#define CLK_TOP_SGM_325M		63
#define CLK_TOP_SGM_REG			64
#define CLK_TOP_F26M			65
#define CLK_TOP_EIP97B			66
#define CLK_TOP_USB3_PHY		67
#define CLK_TOP_AUD			68
#define CLK_TOP_A1SYS			69
#define CLK_TOP_AUD_L			70
#define CLK_TOP_A_TUNER			71
#define CLK_TOP_U2U3_REF		72
#define CLK_TOP_U2U3_SYS		73
#define CLK_TOP_U2U3_XHCI		74
#define CLK_TOP_USB_FRMCNT		75
#define CLK_TOP_NFI1X_SEL		76
#define CLK_TOP_SPINFI_SEL		77
#define CLK_TOP_SPI_SEL			78
#define CLK_TOP_SPIM_MST_SEL		79
#define CLK_TOP_UART_SEL		80
#define CLK_TOP_PWM_SEL			81
#define CLK_TOP_I2C_SEL			82
#define CLK_TOP_PEXTP_TL_SEL		83
#define CLK_TOP_EMMC_208M_SEL		84
#define CLK_TOP_EMMC_400M_SEL		85

Annotation

Implementation Notes