include/dt-bindings/clock/mt2712-clk.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/mt2712-clk.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/mt2712-clk.h
Extension
.h
Size
12149 bytes
Lines
429
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_MT2712_H
#define _DT_BINDINGS_CLK_MT2712_H

/* APMIXEDSYS */

#define CLK_APMIXED_MAINPLL		0
#define CLK_APMIXED_UNIVPLL		1
#define CLK_APMIXED_VCODECPLL		2
#define CLK_APMIXED_VENCPLL		3
#define CLK_APMIXED_APLL1		4
#define CLK_APMIXED_APLL2		5
#define CLK_APMIXED_LVDSPLL		6
#define CLK_APMIXED_LVDSPLL2		7
#define CLK_APMIXED_MSDCPLL		8
#define CLK_APMIXED_MSDCPLL2		9
#define CLK_APMIXED_TVDPLL		10
#define CLK_APMIXED_MMPLL		11
#define CLK_APMIXED_ARMCA35PLL		12
#define CLK_APMIXED_ARMCA72PLL		13
#define CLK_APMIXED_ETHERPLL		14
#define CLK_APMIXED_NR_CLK		15

/* TOPCKGEN */

#define CLK_TOP_ARMCA35PLL		0
#define CLK_TOP_ARMCA35PLL_600M		1
#define CLK_TOP_ARMCA35PLL_400M		2
#define CLK_TOP_ARMCA72PLL		3
#define CLK_TOP_SYSPLL			4
#define CLK_TOP_SYSPLL_D2		5
#define CLK_TOP_SYSPLL1_D2		6
#define CLK_TOP_SYSPLL1_D4		7
#define CLK_TOP_SYSPLL1_D8		8
#define CLK_TOP_SYSPLL1_D16		9
#define CLK_TOP_SYSPLL_D3		10
#define CLK_TOP_SYSPLL2_D2		11
#define CLK_TOP_SYSPLL2_D4		12
#define CLK_TOP_SYSPLL_D5		13
#define CLK_TOP_SYSPLL3_D2		14
#define CLK_TOP_SYSPLL3_D4		15
#define CLK_TOP_SYSPLL_D7		16
#define CLK_TOP_SYSPLL4_D2		17
#define CLK_TOP_SYSPLL4_D4		18
#define CLK_TOP_UNIVPLL			19
#define CLK_TOP_UNIVPLL_D7		20
#define CLK_TOP_UNIVPLL_D26		21
#define CLK_TOP_UNIVPLL_D52		22
#define CLK_TOP_UNIVPLL_D104		23
#define CLK_TOP_UNIVPLL_D208		24
#define CLK_TOP_UNIVPLL_D2		25
#define CLK_TOP_UNIVPLL1_D2		26
#define CLK_TOP_UNIVPLL1_D4		27
#define CLK_TOP_UNIVPLL1_D8		28
#define CLK_TOP_UNIVPLL_D3		29
#define CLK_TOP_UNIVPLL2_D2		30
#define CLK_TOP_UNIVPLL2_D4		31
#define CLK_TOP_UNIVPLL2_D8		32
#define CLK_TOP_UNIVPLL_D5		33
#define CLK_TOP_UNIVPLL3_D2		34
#define CLK_TOP_UNIVPLL3_D4		35
#define CLK_TOP_UNIVPLL3_D8		36
#define CLK_TOP_F_MP0_PLL1		37
#define CLK_TOP_F_MP0_PLL2		38
#define CLK_TOP_F_BIG_PLL1		39
#define CLK_TOP_F_BIG_PLL2		40
#define CLK_TOP_F_BUS_PLL1		41
#define CLK_TOP_F_BUS_PLL2		42
#define CLK_TOP_APLL1			43
#define CLK_TOP_APLL1_D2		44
#define CLK_TOP_APLL1_D4		45
#define CLK_TOP_APLL1_D8		46
#define CLK_TOP_APLL1_D16		47
#define CLK_TOP_APLL2			48
#define CLK_TOP_APLL2_D2		49
#define CLK_TOP_APLL2_D4		50
#define CLK_TOP_APLL2_D8		51
#define CLK_TOP_APLL2_D16		52
#define CLK_TOP_LVDSPLL			53
#define CLK_TOP_LVDSPLL_D2		54
#define CLK_TOP_LVDSPLL_D4		55
#define CLK_TOP_LVDSPLL_D8		56
#define CLK_TOP_LVDSPLL2		57
#define CLK_TOP_LVDSPLL2_D2		58
#define CLK_TOP_LVDSPLL2_D4		59
#define CLK_TOP_LVDSPLL2_D8		60
#define CLK_TOP_ETHERPLL_125M		61
#define CLK_TOP_ETHERPLL_50M		62
#define CLK_TOP_CVBS			63
#define CLK_TOP_CVBS_D2			64
#define CLK_TOP_SYS_26M			65

Annotation

Implementation Notes