include/dt-bindings/clock/mt7629-clk.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/mt7629-clk.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/mt7629-clk.h
Extension
.h
Size
5726 bytes
Lines
204
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_MT7629_H
#define _DT_BINDINGS_CLK_MT7629_H

/* TOPCKGEN */
#define CLK_TOP_TO_U2_PHY		0
#define CLK_TOP_TO_U2_PHY_1P		1
#define CLK_TOP_PCIE0_PIPE_EN		2
#define CLK_TOP_PCIE1_PIPE_EN		3
#define CLK_TOP_SSUSB_TX250M		4
#define CLK_TOP_SSUSB_EQ_RX250M		5
#define CLK_TOP_SSUSB_CDR_REF		6
#define CLK_TOP_SSUSB_CDR_FB		7
#define CLK_TOP_SATA_ASIC		8
#define CLK_TOP_SATA_RBC		9
#define CLK_TOP_TO_USB3_SYS		10
#define CLK_TOP_P1_1MHZ			11
#define CLK_TOP_4MHZ			12
#define CLK_TOP_P0_1MHZ			13
#define CLK_TOP_ETH_500M		14
#define CLK_TOP_TXCLK_SRC_PRE		15
#define CLK_TOP_RTC			16
#define CLK_TOP_PWM_QTR_26M		17
#define CLK_TOP_CPUM_TCK_IN		18
#define CLK_TOP_TO_USB3_DA_TOP		19
#define CLK_TOP_MEMPLL			20
#define CLK_TOP_DMPLL			21
#define CLK_TOP_DMPLL_D4		22
#define CLK_TOP_DMPLL_D8		23
#define CLK_TOP_SYSPLL_D2		24
#define CLK_TOP_SYSPLL1_D2		25
#define CLK_TOP_SYSPLL1_D4		26
#define CLK_TOP_SYSPLL1_D8		27
#define CLK_TOP_SYSPLL1_D16		28
#define CLK_TOP_SYSPLL2_D2		29
#define CLK_TOP_SYSPLL2_D4		30
#define CLK_TOP_SYSPLL2_D8		31
#define CLK_TOP_SYSPLL_D5		32
#define CLK_TOP_SYSPLL3_D2		33
#define CLK_TOP_SYSPLL3_D4		34
#define CLK_TOP_SYSPLL_D7		35
#define CLK_TOP_SYSPLL4_D2		36
#define CLK_TOP_SYSPLL4_D4		37
#define CLK_TOP_SYSPLL4_D16		38
#define CLK_TOP_UNIVPLL			39
#define CLK_TOP_UNIVPLL1_D2		40
#define CLK_TOP_UNIVPLL1_D4		41
#define CLK_TOP_UNIVPLL1_D8		42
#define CLK_TOP_UNIVPLL_D3		43
#define CLK_TOP_UNIVPLL2_D2		44
#define CLK_TOP_UNIVPLL2_D4		45
#define CLK_TOP_UNIVPLL2_D8		46
#define CLK_TOP_UNIVPLL2_D16		47
#define CLK_TOP_UNIVPLL_D5		48
#define CLK_TOP_UNIVPLL3_D2		49
#define CLK_TOP_UNIVPLL3_D4		50
#define CLK_TOP_UNIVPLL3_D16		51
#define CLK_TOP_UNIVPLL_D7		52
#define CLK_TOP_UNIVPLL_D80_D4		53
#define CLK_TOP_UNIV48M			54
#define CLK_TOP_SGMIIPLL_D2		55
#define CLK_TOP_CLKXTAL_D4		56
#define CLK_TOP_HD_FAXI			57
#define CLK_TOP_FAXI			58
#define CLK_TOP_F_FAUD_INTBUS		59
#define CLK_TOP_AP2WBHIF_HCLK		60
#define CLK_TOP_10M_INFRAO		61
#define CLK_TOP_MSDC30_1		62
#define CLK_TOP_SPI			63
#define CLK_TOP_SF			64
#define CLK_TOP_FLASH			65
#define CLK_TOP_TO_USB3_REF		66
#define CLK_TOP_TO_USB3_MCU		67
#define CLK_TOP_TO_USB3_DMA		68
#define CLK_TOP_FROM_TOP_AHB		69
#define CLK_TOP_FROM_TOP_AXI		70
#define CLK_TOP_PCIE1_MAC_EN		71
#define CLK_TOP_PCIE0_MAC_EN		72
#define CLK_TOP_AXI_SEL			73
#define CLK_TOP_MEM_SEL			74
#define CLK_TOP_DDRPHYCFG_SEL		75
#define CLK_TOP_ETH_SEL			76
#define CLK_TOP_PWM_SEL			77
#define CLK_TOP_F10M_REF_SEL		78
#define CLK_TOP_NFI_INFRA_SEL		79
#define CLK_TOP_FLASH_SEL		80
#define CLK_TOP_UART_SEL		81
#define CLK_TOP_SPI0_SEL		82
#define CLK_TOP_SPI1_SEL		83
#define CLK_TOP_MSDC50_0_SEL		84
#define CLK_TOP_MSDC30_0_SEL		85

Annotation

Implementation Notes