include/dt-bindings/clock/mt8186-clk.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/mt8186-clk.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/mt8186-clk.h- Extension
.h- Size
- 12532 bytes
- Lines
- 446
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_MT8186_H
#define _DT_BINDINGS_CLK_MT8186_H
/* MCUSYS */
#define CLK_MCU_ARMPLL_LL_SEL 0
#define CLK_MCU_ARMPLL_BL_SEL 1
#define CLK_MCU_ARMPLL_BUS_SEL 2
#define CLK_MCU_NR_CLK 3
/* TOPCKGEN */
#define CLK_TOP_AXI 0
#define CLK_TOP_SCP 1
#define CLK_TOP_MFG 2
#define CLK_TOP_CAMTG 3
#define CLK_TOP_CAMTG1 4
#define CLK_TOP_CAMTG2 5
#define CLK_TOP_CAMTG3 6
#define CLK_TOP_CAMTG4 7
#define CLK_TOP_CAMTG5 8
#define CLK_TOP_CAMTG6 9
#define CLK_TOP_UART 10
#define CLK_TOP_SPI 11
#define CLK_TOP_MSDC50_0_HCLK 12
#define CLK_TOP_MSDC50_0 13
#define CLK_TOP_MSDC30_1 14
#define CLK_TOP_AUDIO 15
#define CLK_TOP_AUD_INTBUS 16
#define CLK_TOP_AUD_1 17
#define CLK_TOP_AUD_2 18
#define CLK_TOP_AUD_ENGEN1 19
#define CLK_TOP_AUD_ENGEN2 20
#define CLK_TOP_DISP_PWM 21
#define CLK_TOP_SSPM 22
#define CLK_TOP_DXCC 23
#define CLK_TOP_USB_TOP 24
#define CLK_TOP_SRCK 25
#define CLK_TOP_SPM 26
#define CLK_TOP_I2C 27
#define CLK_TOP_PWM 28
#define CLK_TOP_SENINF 29
#define CLK_TOP_SENINF1 30
#define CLK_TOP_SENINF2 31
#define CLK_TOP_SENINF3 32
#define CLK_TOP_AES_MSDCFDE 33
#define CLK_TOP_PWRAP_ULPOSC 34
#define CLK_TOP_CAMTM 35
#define CLK_TOP_VENC 36
#define CLK_TOP_CAM 37
#define CLK_TOP_IMG1 38
#define CLK_TOP_IPE 39
#define CLK_TOP_DPMAIF 40
#define CLK_TOP_VDEC 41
#define CLK_TOP_DISP 42
#define CLK_TOP_MDP 43
#define CLK_TOP_AUDIO_H 44
#define CLK_TOP_UFS 45
#define CLK_TOP_AES_FDE 46
#define CLK_TOP_AUDIODSP 47
#define CLK_TOP_DVFSRC 48
#define CLK_TOP_DSI_OCC 49
#define CLK_TOP_SPMI_MST 50
#define CLK_TOP_SPINOR 51
#define CLK_TOP_NNA 52
#define CLK_TOP_NNA1 53
#define CLK_TOP_NNA2 54
#define CLK_TOP_SSUSB_XHCI 55
#define CLK_TOP_SSUSB_TOP_1P 56
#define CLK_TOP_SSUSB_XHCI_1P 57
#define CLK_TOP_WPE 58
#define CLK_TOP_DPI 59
#define CLK_TOP_U3_OCC_250M 60
#define CLK_TOP_U3_OCC_500M 61
#define CLK_TOP_ADSP_BUS 62
#define CLK_TOP_APLL_I2S0_MCK_SEL 63
#define CLK_TOP_APLL_I2S1_MCK_SEL 64
#define CLK_TOP_APLL_I2S2_MCK_SEL 65
#define CLK_TOP_APLL_I2S4_MCK_SEL 66
#define CLK_TOP_APLL_TDMOUT_MCK_SEL 67
#define CLK_TOP_MAINPLL_D2 68
#define CLK_TOP_MAINPLL_D2_D2 69
#define CLK_TOP_MAINPLL_D2_D4 70
#define CLK_TOP_MAINPLL_D2_D16 71
#define CLK_TOP_MAINPLL_D3 72
#define CLK_TOP_MAINPLL_D3_D2 73
#define CLK_TOP_MAINPLL_D3_D4 74
#define CLK_TOP_MAINPLL_D5 75
#define CLK_TOP_MAINPLL_D5_D2 76
#define CLK_TOP_MAINPLL_D5_D4 77
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.