include/dt-bindings/clock/mt8192-clk.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/mt8192-clk.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/mt8192-clk.h- Extension
.h- Size
- 15922 bytes
- Lines
- 586
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_MT8192_H
#define _DT_BINDINGS_CLK_MT8192_H
/* TOPCKGEN */
#define CLK_TOP_AXI_SEL 0
#define CLK_TOP_SPM_SEL 1
#define CLK_TOP_SCP_SEL 2
#define CLK_TOP_BUS_AXIMEM_SEL 3
#define CLK_TOP_DISP_SEL 4
#define CLK_TOP_MDP_SEL 5
#define CLK_TOP_IMG1_SEL 6
#define CLK_TOP_IMG2_SEL 7
#define CLK_TOP_IPE_SEL 8
#define CLK_TOP_DPE_SEL 9
#define CLK_TOP_CAM_SEL 10
#define CLK_TOP_CCU_SEL 11
#define CLK_TOP_DSP7_SEL 12
#define CLK_TOP_MFG_REF_SEL 13
#define CLK_TOP_MFG_PLL_SEL 14
#define CLK_TOP_CAMTG_SEL 15
#define CLK_TOP_CAMTG2_SEL 16
#define CLK_TOP_CAMTG3_SEL 17
#define CLK_TOP_CAMTG4_SEL 18
#define CLK_TOP_CAMTG5_SEL 19
#define CLK_TOP_CAMTG6_SEL 20
#define CLK_TOP_UART_SEL 21
#define CLK_TOP_SPI_SEL 22
#define CLK_TOP_MSDC50_0_H_SEL 23
#define CLK_TOP_MSDC50_0_SEL 24
#define CLK_TOP_MSDC30_1_SEL 25
#define CLK_TOP_MSDC30_2_SEL 26
#define CLK_TOP_AUDIO_SEL 27
#define CLK_TOP_AUD_INTBUS_SEL 28
#define CLK_TOP_PWRAP_ULPOSC_SEL 29
#define CLK_TOP_ATB_SEL 30
#define CLK_TOP_DPI_SEL 31
#define CLK_TOP_SCAM_SEL 32
#define CLK_TOP_DISP_PWM_SEL 33
#define CLK_TOP_USB_TOP_SEL 34
#define CLK_TOP_SSUSB_XHCI_SEL 35
#define CLK_TOP_I2C_SEL 36
#define CLK_TOP_SENINF_SEL 37
#define CLK_TOP_SENINF1_SEL 38
#define CLK_TOP_SENINF2_SEL 39
#define CLK_TOP_SENINF3_SEL 40
#define CLK_TOP_TL_SEL 41
#define CLK_TOP_DXCC_SEL 42
#define CLK_TOP_AUD_ENGEN1_SEL 43
#define CLK_TOP_AUD_ENGEN2_SEL 44
#define CLK_TOP_AES_UFSFDE_SEL 45
#define CLK_TOP_UFS_SEL 46
#define CLK_TOP_AUD_1_SEL 47
#define CLK_TOP_AUD_2_SEL 48
#define CLK_TOP_ADSP_SEL 49
#define CLK_TOP_DPMAIF_MAIN_SEL 50
#define CLK_TOP_VENC_SEL 51
#define CLK_TOP_VDEC_SEL 52
#define CLK_TOP_CAMTM_SEL 53
#define CLK_TOP_PWM_SEL 54
#define CLK_TOP_AUDIO_H_SEL 55
#define CLK_TOP_SPMI_MST_SEL 56
#define CLK_TOP_AES_MSDCFDE_SEL 57
#define CLK_TOP_SFLASH_SEL 58
#define CLK_TOP_APLL_I2S0_M_SEL 59
#define CLK_TOP_APLL_I2S1_M_SEL 60
#define CLK_TOP_APLL_I2S2_M_SEL 61
#define CLK_TOP_APLL_I2S3_M_SEL 62
#define CLK_TOP_APLL_I2S4_M_SEL 63
#define CLK_TOP_APLL_I2S5_M_SEL 64
#define CLK_TOP_APLL_I2S6_M_SEL 65
#define CLK_TOP_APLL_I2S7_M_SEL 66
#define CLK_TOP_APLL_I2S8_M_SEL 67
#define CLK_TOP_APLL_I2S9_M_SEL 68
#define CLK_TOP_MAINPLL_D3 69
#define CLK_TOP_MAINPLL_D4 70
#define CLK_TOP_MAINPLL_D4_D2 71
#define CLK_TOP_MAINPLL_D4_D4 72
#define CLK_TOP_MAINPLL_D4_D8 73
#define CLK_TOP_MAINPLL_D4_D16 74
#define CLK_TOP_MAINPLL_D5 75
#define CLK_TOP_MAINPLL_D5_D2 76
#define CLK_TOP_MAINPLL_D5_D4 77
#define CLK_TOP_MAINPLL_D5_D8 78
#define CLK_TOP_MAINPLL_D6 79
#define CLK_TOP_MAINPLL_D6_D2 80
#define CLK_TOP_MAINPLL_D6_D4 81
#define CLK_TOP_MAINPLL_D7 82
#define CLK_TOP_MAINPLL_D7_D2 83
#define CLK_TOP_MAINPLL_D7_D4 84
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.