include/dt-bindings/clock/mt8195-clk.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/mt8195-clk.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/mt8195-clk.h- Extension
.h- Size
- 24993 bytes
- Lines
- 867
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_MT8195_H
#define _DT_BINDINGS_CLK_MT8195_H
/* TOPCKGEN */
#define CLK_TOP_AXI 0
#define CLK_TOP_SPM 1
#define CLK_TOP_SCP 2
#define CLK_TOP_BUS_AXIMEM 3
#define CLK_TOP_VPP 4
#define CLK_TOP_ETHDR 5
#define CLK_TOP_IPE 6
#define CLK_TOP_CAM 7
#define CLK_TOP_CCU 8
#define CLK_TOP_IMG 9
#define CLK_TOP_CAMTM 10
#define CLK_TOP_DSP 11
#define CLK_TOP_DSP1 12
#define CLK_TOP_DSP2 13
#define CLK_TOP_DSP3 14
#define CLK_TOP_DSP4 15
#define CLK_TOP_DSP5 16
#define CLK_TOP_DSP6 17
#define CLK_TOP_DSP7 18
#define CLK_TOP_IPU_IF 19
#define CLK_TOP_MFG_CORE_TMP 20
#define CLK_TOP_CAMTG 21
#define CLK_TOP_CAMTG2 22
#define CLK_TOP_CAMTG3 23
#define CLK_TOP_CAMTG4 24
#define CLK_TOP_CAMTG5 25
#define CLK_TOP_UART 26
#define CLK_TOP_SPI 27
#define CLK_TOP_SPIS 28
#define CLK_TOP_MSDC50_0_HCLK 29
#define CLK_TOP_MSDC50_0 30
#define CLK_TOP_MSDC30_1 31
#define CLK_TOP_MSDC30_2 32
#define CLK_TOP_INTDIR 33
#define CLK_TOP_AUD_INTBUS 34
#define CLK_TOP_AUDIO_H 35
#define CLK_TOP_PWRAP_ULPOSC 36
#define CLK_TOP_ATB 37
#define CLK_TOP_PWRMCU 38
#define CLK_TOP_DP 39
#define CLK_TOP_EDP 40
#define CLK_TOP_DPI 41
#define CLK_TOP_DISP_PWM0 42
#define CLK_TOP_DISP_PWM1 43
#define CLK_TOP_USB_TOP 44
#define CLK_TOP_SSUSB_XHCI 45
#define CLK_TOP_USB_TOP_1P 46
#define CLK_TOP_SSUSB_XHCI_1P 47
#define CLK_TOP_USB_TOP_2P 48
#define CLK_TOP_SSUSB_XHCI_2P 49
#define CLK_TOP_USB_TOP_3P 50
#define CLK_TOP_SSUSB_XHCI_3P 51
#define CLK_TOP_I2C 52
#define CLK_TOP_SENINF 53
#define CLK_TOP_SENINF1 54
#define CLK_TOP_SENINF2 55
#define CLK_TOP_SENINF3 56
#define CLK_TOP_GCPU 57
#define CLK_TOP_DXCC 58
#define CLK_TOP_DPMAIF_MAIN 59
#define CLK_TOP_AES_UFSFDE 60
#define CLK_TOP_UFS 61
#define CLK_TOP_UFS_TICK1US 62
#define CLK_TOP_UFS_MP_SAP_CFG 63
#define CLK_TOP_VENC 64
#define CLK_TOP_VDEC 65
#define CLK_TOP_PWM 66
#define CLK_TOP_MCUPM 67
#define CLK_TOP_SPMI_P_MST 68
#define CLK_TOP_SPMI_M_MST 69
#define CLK_TOP_DVFSRC 70
#define CLK_TOP_TL 71
#define CLK_TOP_TL_P1 72
#define CLK_TOP_AES_MSDCFDE 73
#define CLK_TOP_DSI_OCC 74
#define CLK_TOP_WPE_VPP 75
#define CLK_TOP_HDCP 76
#define CLK_TOP_HDCP_24M 77
#define CLK_TOP_HD20_DACR_REF_CLK 78
#define CLK_TOP_HD20_HDCP_CCLK 79
#define CLK_TOP_HDMI_XTAL 80
#define CLK_TOP_HDMI_APB 81
#define CLK_TOP_SNPS_ETH_250M 82
#define CLK_TOP_SNPS_ETH_62P4M_PTP 83
#define CLK_TOP_SNPS_ETH_50M_RMII 84
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.