include/dt-bindings/clock/qcom,dispcc-sc7280.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,dispcc-sc7280.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/qcom,dispcc-sc7280.h
Extension
.h
Size
2016 bytes
Lines
60
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7280_H
#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7280_H

/* DISP_CC clocks */
#define DISP_CC_PLL0					0
#define DISP_CC_MDSS_AHB_CLK				1
#define DISP_CC_MDSS_AHB_CLK_SRC			2
#define DISP_CC_MDSS_BYTE0_CLK				3
#define DISP_CC_MDSS_BYTE0_CLK_SRC			4
#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC			5
#define DISP_CC_MDSS_BYTE0_INTF_CLK			6
#define DISP_CC_MDSS_DP_AUX_CLK				7
#define DISP_CC_MDSS_DP_AUX_CLK_SRC			8
#define DISP_CC_MDSS_DP_CRYPTO_CLK			9
#define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC			10
#define DISP_CC_MDSS_DP_LINK_CLK			11
#define DISP_CC_MDSS_DP_LINK_CLK_SRC			12
#define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC		13
#define DISP_CC_MDSS_DP_LINK_INTF_CLK			14
#define DISP_CC_MDSS_DP_PIXEL_CLK			15
#define DISP_CC_MDSS_DP_PIXEL_CLK_SRC			16
#define DISP_CC_MDSS_EDP_AUX_CLK			17
#define DISP_CC_MDSS_EDP_AUX_CLK_SRC			18
#define DISP_CC_MDSS_EDP_LINK_CLK			19
#define DISP_CC_MDSS_EDP_LINK_CLK_SRC			20
#define DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC		21
#define DISP_CC_MDSS_EDP_LINK_INTF_CLK			22
#define DISP_CC_MDSS_EDP_PIXEL_CLK			23
#define DISP_CC_MDSS_EDP_PIXEL_CLK_SRC			24
#define DISP_CC_MDSS_ESC0_CLK				25
#define DISP_CC_MDSS_ESC0_CLK_SRC			26
#define DISP_CC_MDSS_MDP_CLK				27
#define DISP_CC_MDSS_MDP_CLK_SRC			28
#define DISP_CC_MDSS_MDP_LUT_CLK			29
#define DISP_CC_MDSS_NON_GDSC_AHB_CLK			30
#define DISP_CC_MDSS_PCLK0_CLK				31
#define DISP_CC_MDSS_PCLK0_CLK_SRC			32
#define DISP_CC_MDSS_ROT_CLK				33
#define DISP_CC_MDSS_ROT_CLK_SRC			34
#define DISP_CC_MDSS_RSCC_AHB_CLK			35
#define DISP_CC_MDSS_RSCC_VSYNC_CLK			36
#define DISP_CC_MDSS_VSYNC_CLK				37
#define DISP_CC_MDSS_VSYNC_CLK_SRC			38
#define DISP_CC_SLEEP_CLK				39
#define DISP_CC_XO_CLK					40

/* DISP_CC power domains */
#define DISP_CC_MDSS_CORE_GDSC				0

/* DISPCC resets */
#define DISP_CC_MDSS_CORE_BCR				0
#define DISP_CC_MDSS_RSCC_BCR				1

#endif

Annotation

Implementation Notes