include/dt-bindings/clock/qcom,gcc-ipq6018.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,gcc-ipq6018.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/qcom,gcc-ipq6018.h- Extension
.h- Size
- 8918 bytes
- Lines
- 263
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLOCK_IPQ_GCC_6018_H
#define _DT_BINDINGS_CLOCK_IPQ_GCC_6018_H
#define GPLL0 0
#define UBI32_PLL 1
#define GPLL6 2
#define GPLL4 3
#define PCNOC_BFDCD_CLK_SRC 4
#define GPLL2 5
#define NSS_CRYPTO_PLL 6
#define NSS_PPE_CLK_SRC 7
#define GCC_XO_CLK_SRC 8
#define NSS_CE_CLK_SRC 9
#define GCC_SLEEP_CLK_SRC 10
#define APSS_AHB_CLK_SRC 11
#define NSS_PORT5_RX_CLK_SRC 12
#define NSS_PORT5_TX_CLK_SRC 13
#define PCIE0_AXI_CLK_SRC 14
#define USB0_MASTER_CLK_SRC 15
#define APSS_AHB_POSTDIV_CLK_SRC 16
#define NSS_PORT1_RX_CLK_SRC 17
#define NSS_PORT1_TX_CLK_SRC 18
#define NSS_PORT2_RX_CLK_SRC 19
#define NSS_PORT2_TX_CLK_SRC 20
#define NSS_PORT3_RX_CLK_SRC 21
#define NSS_PORT3_TX_CLK_SRC 22
#define NSS_PORT4_RX_CLK_SRC 23
#define NSS_PORT4_TX_CLK_SRC 24
#define NSS_PORT5_RX_DIV_CLK_SRC 25
#define NSS_PORT5_TX_DIV_CLK_SRC 26
#define APSS_AXI_CLK_SRC 27
#define NSS_CRYPTO_CLK_SRC 28
#define NSS_PORT1_RX_DIV_CLK_SRC 29
#define NSS_PORT1_TX_DIV_CLK_SRC 30
#define NSS_PORT2_RX_DIV_CLK_SRC 31
#define NSS_PORT2_TX_DIV_CLK_SRC 32
#define NSS_PORT3_RX_DIV_CLK_SRC 33
#define NSS_PORT3_TX_DIV_CLK_SRC 34
#define NSS_PORT4_RX_DIV_CLK_SRC 35
#define NSS_PORT4_TX_DIV_CLK_SRC 36
#define NSS_UBI0_CLK_SRC 37
#define BLSP1_QUP1_I2C_APPS_CLK_SRC 38
#define BLSP1_QUP1_SPI_APPS_CLK_SRC 39
#define BLSP1_QUP2_I2C_APPS_CLK_SRC 40
#define BLSP1_QUP2_SPI_APPS_CLK_SRC 41
#define BLSP1_QUP3_I2C_APPS_CLK_SRC 42
#define BLSP1_QUP3_SPI_APPS_CLK_SRC 43
#define BLSP1_QUP4_I2C_APPS_CLK_SRC 44
#define BLSP1_QUP4_SPI_APPS_CLK_SRC 45
#define BLSP1_QUP5_I2C_APPS_CLK_SRC 46
#define BLSP1_QUP5_SPI_APPS_CLK_SRC 47
#define BLSP1_QUP6_I2C_APPS_CLK_SRC 48
#define BLSP1_QUP6_SPI_APPS_CLK_SRC 49
#define BLSP1_UART1_APPS_CLK_SRC 50
#define BLSP1_UART2_APPS_CLK_SRC 51
#define BLSP1_UART3_APPS_CLK_SRC 52
#define BLSP1_UART4_APPS_CLK_SRC 53
#define BLSP1_UART5_APPS_CLK_SRC 54
#define BLSP1_UART6_APPS_CLK_SRC 55
#define CRYPTO_CLK_SRC 56
#define NSS_UBI0_DIV_CLK_SRC 57
#define PCIE0_AUX_CLK_SRC 58
#define PCIE0_PIPE_CLK_SRC 59
#define SDCC1_APPS_CLK_SRC 60
#define USB0_AUX_CLK_SRC 61
#define USB0_MOCK_UTMI_CLK_SRC 62
#define USB0_PIPE_CLK_SRC 63
#define USB1_MOCK_UTMI_CLK_SRC 64
#define GCC_APSS_AHB_CLK 65
#define GCC_APSS_AXI_CLK 66
#define GCC_BLSP1_AHB_CLK 67
#define GCC_BLSP1_QUP1_I2C_APPS_CLK 68
#define GCC_BLSP1_QUP1_SPI_APPS_CLK 69
#define GCC_BLSP1_QUP2_I2C_APPS_CLK 70
#define GCC_BLSP1_QUP2_SPI_APPS_CLK 71
#define GCC_BLSP1_QUP3_I2C_APPS_CLK 72
#define GCC_BLSP1_QUP3_SPI_APPS_CLK 73
#define GCC_BLSP1_QUP4_I2C_APPS_CLK 74
#define GCC_BLSP1_QUP4_SPI_APPS_CLK 75
#define GCC_BLSP1_QUP5_I2C_APPS_CLK 76
#define GCC_BLSP1_QUP5_SPI_APPS_CLK 77
#define GCC_BLSP1_QUP6_I2C_APPS_CLK 78
#define GCC_BLSP1_QUP6_SPI_APPS_CLK 79
#define GCC_BLSP1_UART1_APPS_CLK 80
#define GCC_BLSP1_UART2_APPS_CLK 81
#define GCC_BLSP1_UART3_APPS_CLK 82
#define GCC_BLSP1_UART4_APPS_CLK 83
#define GCC_BLSP1_UART5_APPS_CLK 84
#define GCC_BLSP1_UART6_APPS_CLK 85
#define GCC_CRYPTO_AHB_CLK 86
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.