include/dt-bindings/clock/qcom,gcc-qcs404.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,gcc-qcs404.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/qcom,gcc-qcs404.h
Extension
.h
Size
6293 bytes
Lines
185
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_QCOM_GCC_QCS404_H
#define _DT_BINDINGS_CLK_QCOM_GCC_QCS404_H

#define GCC_APSS_AHB_CLK_SRC				0
#define GCC_BLSP1_QUP0_I2C_APPS_CLK_SRC			1
#define GCC_BLSP1_QUP0_SPI_APPS_CLK_SRC			2
#define GCC_BLSP1_QUP1_I2C_APPS_CLK_SRC			3
#define GCC_BLSP1_QUP1_SPI_APPS_CLK_SRC			4
#define GCC_BLSP1_QUP2_I2C_APPS_CLK_SRC			5
#define GCC_BLSP1_QUP2_SPI_APPS_CLK_SRC			6
#define GCC_BLSP1_QUP3_I2C_APPS_CLK_SRC			7
#define GCC_BLSP1_QUP3_SPI_APPS_CLK_SRC			8
#define GCC_BLSP1_QUP4_I2C_APPS_CLK_SRC			9
#define GCC_BLSP1_QUP4_SPI_APPS_CLK_SRC			10
#define GCC_BLSP1_UART0_APPS_CLK_SRC			11
#define GCC_BLSP1_UART1_APPS_CLK_SRC			12
#define GCC_BLSP1_UART2_APPS_CLK_SRC			13
#define GCC_BLSP1_UART3_APPS_CLK_SRC			14
#define GCC_BLSP2_QUP0_I2C_APPS_CLK_SRC			15
#define GCC_BLSP2_QUP0_SPI_APPS_CLK_SRC			16
#define GCC_BLSP2_UART0_APPS_CLK_SRC			17
#define GCC_BYTE0_CLK_SRC				18
#define GCC_EMAC_CLK_SRC				19
#define GCC_EMAC_PTP_CLK_SRC				20
#define GCC_ESC0_CLK_SRC				21
#define GCC_APSS_AHB_CLK				22
#define GCC_APSS_AXI_CLK				23
#define GCC_BIMC_APSS_AXI_CLK				24
#define GCC_BIMC_GFX_CLK				25
#define GCC_BIMC_MDSS_CLK				26
#define GCC_BLSP1_AHB_CLK				27
#define GCC_BLSP1_QUP0_I2C_APPS_CLK			28
#define GCC_BLSP1_QUP0_SPI_APPS_CLK			29
#define GCC_BLSP1_QUP1_I2C_APPS_CLK			30
#define GCC_BLSP1_QUP1_SPI_APPS_CLK			31
#define GCC_BLSP1_QUP2_I2C_APPS_CLK			32
#define GCC_BLSP1_QUP2_SPI_APPS_CLK			33
#define GCC_BLSP1_QUP3_I2C_APPS_CLK			34
#define GCC_BLSP1_QUP3_SPI_APPS_CLK			35
#define GCC_BLSP1_QUP4_I2C_APPS_CLK			36
#define GCC_BLSP1_QUP4_SPI_APPS_CLK			37
#define GCC_BLSP1_UART0_APPS_CLK			38
#define GCC_BLSP1_UART1_APPS_CLK			39
#define GCC_BLSP1_UART2_APPS_CLK			40
#define GCC_BLSP1_UART3_APPS_CLK			41
#define GCC_BLSP2_AHB_CLK				42
#define GCC_BLSP2_QUP0_I2C_APPS_CLK			43
#define GCC_BLSP2_QUP0_SPI_APPS_CLK			44
#define GCC_BLSP2_UART0_APPS_CLK			45
#define GCC_BOOT_ROM_AHB_CLK				46
#define GCC_DCC_CLK					47
#define GCC_GENI_IR_H_CLK				48
#define GCC_ETH_AXI_CLK					49
#define GCC_ETH_PTP_CLK					50
#define GCC_ETH_RGMII_CLK				51
#define GCC_ETH_SLAVE_AHB_CLK				52
#define GCC_GENI_IR_S_CLK				53
#define GCC_GP1_CLK					54
#define GCC_GP2_CLK					55
#define GCC_GP3_CLK					56
#define GCC_MDSS_AHB_CLK				57
#define GCC_MDSS_AXI_CLK				58
#define GCC_MDSS_BYTE0_CLK				59
#define GCC_MDSS_ESC0_CLK				60
#define GCC_MDSS_HDMI_APP_CLK				61
#define GCC_MDSS_HDMI_PCLK_CLK				62
#define GCC_MDSS_MDP_CLK				63
#define GCC_MDSS_PCLK0_CLK				64
#define GCC_MDSS_VSYNC_CLK				65
#define GCC_OXILI_AHB_CLK				66
#define GCC_OXILI_GFX3D_CLK				67
#define GCC_PCIE_0_AUX_CLK				68
#define GCC_PCIE_0_CFG_AHB_CLK				69
#define GCC_PCIE_0_MSTR_AXI_CLK				70
#define GCC_PCIE_0_PIPE_CLK				71
#define GCC_PCIE_0_SLV_AXI_CLK				72
#define GCC_PCNOC_USB2_CLK				73
#define GCC_PCNOC_USB3_CLK				74
#define GCC_PDM2_CLK					75
#define GCC_PDM_AHB_CLK					76
#define GCC_VSYNC_CLK_SRC				77
#define GCC_PRNG_AHB_CLK				78
#define GCC_PWM0_XO512_CLK				79
#define GCC_PWM1_XO512_CLK				80
#define GCC_PWM2_XO512_CLK				81
#define GCC_SDCC1_AHB_CLK				82
#define GCC_SDCC1_APPS_CLK				83
#define GCC_SDCC1_ICE_CORE_CLK				84
#define GCC_SDCC2_AHB_CLK				85
#define GCC_SDCC2_APPS_CLK				86

Annotation

Implementation Notes