include/dt-bindings/clock/qcom,gcc-sc7180.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,gcc-sc7180.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/qcom,gcc-sc7180.h
Extension
.h
Size
5756 bytes
Lines
163
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_QCOM_GCC_SC7180_H
#define _DT_BINDINGS_CLK_QCOM_GCC_SC7180_H

/* GCC clocks */
#define GCC_GPLL0_MAIN_DIV_CDIV					0
#define GPLL0							1
#define GPLL0_OUT_EVEN						2
#define GPLL1							3
#define GPLL4							4
#define GPLL6							5
#define GPLL7							6
#define GCC_AGGRE_UFS_PHY_AXI_CLK				7
#define GCC_AGGRE_USB3_PRIM_AXI_CLK				8
#define GCC_BOOT_ROM_AHB_CLK					9
#define GCC_CAMERA_AHB_CLK					10
#define GCC_CAMERA_HF_AXI_CLK					11
#define GCC_CAMERA_THROTTLE_HF_AXI_CLK				12
#define GCC_CAMERA_XO_CLK					13
#define GCC_CE1_AHB_CLK						14
#define GCC_CE1_AXI_CLK						15
#define GCC_CE1_CLK						16
#define GCC_CFG_NOC_USB3_PRIM_AXI_CLK				17
#define GCC_CPUSS_AHB_CLK					18
#define GCC_CPUSS_AHB_CLK_SRC					19
#define GCC_CPUSS_GNOC_CLK					20
#define GCC_CPUSS_RBCPR_CLK					21
#define GCC_DDRSS_GPU_AXI_CLK					22
#define GCC_DISP_AHB_CLK					23
#define GCC_DISP_GPLL0_CLK_SRC					24
#define GCC_DISP_GPLL0_DIV_CLK_SRC				25
#define GCC_DISP_HF_AXI_CLK					26
#define GCC_DISP_THROTTLE_HF_AXI_CLK				27
#define GCC_DISP_XO_CLK						28
#define GCC_GP1_CLK						29
#define GCC_GP1_CLK_SRC						30
#define GCC_GP2_CLK						31
#define GCC_GP2_CLK_SRC						32
#define GCC_GP3_CLK						33
#define GCC_GP3_CLK_SRC						34
#define GCC_GPU_CFG_AHB_CLK					35
#define GCC_GPU_GPLL0_CLK_SRC					36
#define GCC_GPU_GPLL0_DIV_CLK_SRC				37
#define GCC_GPU_MEMNOC_GFX_CLK					38
#define GCC_GPU_SNOC_DVM_GFX_CLK				39
#define GCC_NPU_AXI_CLK						40
#define GCC_NPU_BWMON_AXI_CLK					41
#define GCC_NPU_BWMON_DMA_CFG_AHB_CLK				42
#define GCC_NPU_BWMON_DSP_CFG_AHB_CLK				43
#define GCC_NPU_CFG_AHB_CLK					44
#define GCC_NPU_DMA_CLK						45
#define GCC_NPU_GPLL0_CLK_SRC					46
#define GCC_NPU_GPLL0_DIV_CLK_SRC				47
#define GCC_PDM2_CLK						48
#define GCC_PDM2_CLK_SRC					49
#define GCC_PDM_AHB_CLK						50
#define GCC_PDM_XO4_CLK						51
#define GCC_PRNG_AHB_CLK					52
#define GCC_QSPI_CNOC_PERIPH_AHB_CLK				53
#define GCC_QSPI_CORE_CLK					54
#define GCC_QSPI_CORE_CLK_SRC					55
#define GCC_QUPV3_WRAP0_CORE_2X_CLK				56
#define GCC_QUPV3_WRAP0_CORE_CLK				57
#define GCC_QUPV3_WRAP0_S0_CLK					58
#define GCC_QUPV3_WRAP0_S0_CLK_SRC				59
#define GCC_QUPV3_WRAP0_S1_CLK					60
#define GCC_QUPV3_WRAP0_S1_CLK_SRC				61
#define GCC_QUPV3_WRAP0_S2_CLK					62
#define GCC_QUPV3_WRAP0_S2_CLK_SRC				63
#define GCC_QUPV3_WRAP0_S3_CLK					64
#define GCC_QUPV3_WRAP0_S3_CLK_SRC				65
#define GCC_QUPV3_WRAP0_S4_CLK					66
#define GCC_QUPV3_WRAP0_S4_CLK_SRC				67
#define GCC_QUPV3_WRAP0_S5_CLK					68
#define GCC_QUPV3_WRAP0_S5_CLK_SRC				69
#define GCC_QUPV3_WRAP1_CORE_2X_CLK				70
#define GCC_QUPV3_WRAP1_CORE_CLK				71
#define GCC_QUPV3_WRAP1_S0_CLK					72
#define GCC_QUPV3_WRAP1_S0_CLK_SRC				73
#define GCC_QUPV3_WRAP1_S1_CLK					74
#define GCC_QUPV3_WRAP1_S1_CLK_SRC				75
#define GCC_QUPV3_WRAP1_S2_CLK					76
#define GCC_QUPV3_WRAP1_S2_CLK_SRC				77
#define GCC_QUPV3_WRAP1_S3_CLK					78
#define GCC_QUPV3_WRAP1_S3_CLK_SRC				79
#define GCC_QUPV3_WRAP1_S4_CLK					80
#define GCC_QUPV3_WRAP1_S4_CLK_SRC				81
#define GCC_QUPV3_WRAP1_S5_CLK					82
#define GCC_QUPV3_WRAP1_S5_CLK_SRC				83
#define GCC_QUPV3_WRAP_0_M_AHB_CLK				84
#define GCC_QUPV3_WRAP_0_S_AHB_CLK				85

Annotation

Implementation Notes