include/dt-bindings/clock/qcom,gcc-sc7280.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,gcc-sc7280.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/qcom,gcc-sc7280.h
Extension
.h
Size
8212 bytes
Lines
227
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_QCOM_GCC_SC7280_H
#define _DT_BINDINGS_CLK_QCOM_GCC_SC7280_H

/* GCC clocks */
#define GCC_GPLL0					0
#define GCC_GPLL0_OUT_EVEN				1
#define GCC_GPLL0_OUT_ODD				2
#define GCC_GPLL1					3
#define GCC_GPLL10					4
#define GCC_GPLL4					5
#define GCC_GPLL9					6
#define GCC_AGGRE_NOC_PCIE_0_AXI_CLK			7
#define GCC_AGGRE_NOC_PCIE_1_AXI_CLK			8
#define GCC_AGGRE_UFS_PHY_AXI_CLK			9
#define GCC_AGGRE_USB3_PRIM_AXI_CLK			10
#define GCC_CAMERA_AHB_CLK				11
#define GCC_CAMERA_HF_AXI_CLK				12
#define GCC_CAMERA_SF_AXI_CLK				13
#define GCC_CAMERA_XO_CLK				14
#define GCC_CFG_NOC_USB3_PRIM_AXI_CLK			15
#define GCC_CFG_NOC_USB3_SEC_AXI_CLK			16
#define GCC_CPUSS_AHB_CLK				17
#define GCC_CPUSS_AHB_CLK_SRC				18
#define GCC_CPUSS_AHB_POSTDIV_CLK_SRC			19
#define GCC_DDRSS_GPU_AXI_CLK				20
#define GCC_DDRSS_PCIE_SF_CLK				21
#define GCC_DISP_AHB_CLK				22
#define GCC_DISP_GPLL0_CLK_SRC				23
#define GCC_DISP_HF_AXI_CLK				24
#define GCC_DISP_SF_AXI_CLK				25
#define GCC_DISP_XO_CLK					26
#define GCC_GP1_CLK					27
#define GCC_GP1_CLK_SRC					28
#define GCC_GP2_CLK					29
#define GCC_GP2_CLK_SRC					30
#define GCC_GP3_CLK					31
#define GCC_GP3_CLK_SRC					32
#define GCC_GPU_CFG_AHB_CLK				33
#define GCC_GPU_GPLL0_CLK_SRC				34
#define GCC_GPU_GPLL0_DIV_CLK_SRC			35
#define GCC_GPU_IREF_EN					36
#define GCC_GPU_MEMNOC_GFX_CLK				37
#define GCC_GPU_SNOC_DVM_GFX_CLK			38
#define GCC_PCIE0_PHY_RCHNG_CLK				39
#define GCC_PCIE1_PHY_RCHNG_CLK				40
#define GCC_PCIE_0_AUX_CLK				41
#define GCC_PCIE_0_AUX_CLK_SRC				42
#define GCC_PCIE_0_CFG_AHB_CLK				43
#define GCC_PCIE_0_MSTR_AXI_CLK				44
#define GCC_PCIE_0_PHY_RCHNG_CLK_SRC			45
#define GCC_PCIE_0_PIPE_CLK				46
#define GCC_PCIE_0_PIPE_CLK_SRC				47
#define GCC_PCIE_0_SLV_AXI_CLK				48
#define GCC_PCIE_0_SLV_Q2A_AXI_CLK			49
#define GCC_PCIE_1_AUX_CLK				50
#define GCC_PCIE_1_AUX_CLK_SRC				51
#define GCC_PCIE_1_CFG_AHB_CLK				52
#define GCC_PCIE_1_MSTR_AXI_CLK				53
#define GCC_PCIE_1_PHY_RCHNG_CLK_SRC			54
#define GCC_PCIE_1_PIPE_CLK				55
#define GCC_PCIE_1_PIPE_CLK_SRC				56
#define GCC_PCIE_1_SLV_AXI_CLK				57
#define GCC_PCIE_1_SLV_Q2A_AXI_CLK			58
#define GCC_PCIE_THROTTLE_CORE_CLK			59
#define GCC_PDM2_CLK					60
#define GCC_PDM2_CLK_SRC				61
#define GCC_PDM_AHB_CLK					62
#define GCC_PDM_XO4_CLK					63
#define GCC_QMIP_CAMERA_NRT_AHB_CLK			64
#define GCC_QMIP_CAMERA_RT_AHB_CLK			65
#define GCC_QMIP_DISP_AHB_CLK				66
#define GCC_QMIP_VIDEO_VCODEC_AHB_CLK			67
#define GCC_QUPV3_WRAP0_CORE_2X_CLK			68
#define GCC_QUPV3_WRAP0_CORE_CLK			69
#define GCC_QUPV3_WRAP0_S0_CLK				70
#define GCC_QUPV3_WRAP0_S0_CLK_SRC			71
#define GCC_QUPV3_WRAP0_S1_CLK				72
#define GCC_QUPV3_WRAP0_S1_CLK_SRC			73
#define GCC_QUPV3_WRAP0_S2_CLK				74
#define GCC_QUPV3_WRAP0_S2_CLK_SRC			75
#define GCC_QUPV3_WRAP0_S3_CLK				76
#define GCC_QUPV3_WRAP0_S3_CLK_SRC			77
#define GCC_QUPV3_WRAP0_S4_CLK				78
#define GCC_QUPV3_WRAP0_S4_CLK_SRC			79
#define GCC_QUPV3_WRAP0_S5_CLK				80
#define GCC_QUPV3_WRAP0_S5_CLK_SRC			81
#define GCC_QUPV3_WRAP0_S6_CLK				82
#define GCC_QUPV3_WRAP0_S6_CLK_SRC			83
#define GCC_QUPV3_WRAP0_S7_CLK				84
#define GCC_QUPV3_WRAP0_S7_CLK_SRC			85

Annotation

Implementation Notes