include/dt-bindings/clock/qcom,ipq5332-gcc.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,ipq5332-gcc.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/qcom,ipq5332-gcc.h
Extension
.h
Size
12336 bytes
Lines
337
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_QCOM_GCC_IPQ5332_H
#define _DT_BINDINGS_CLK_QCOM_GCC_IPQ5332_H

#define GPLL0_MAIN					0
#define GPLL0						1
#define GPLL2_MAIN					2
#define GPLL2						3
#define GPLL4_MAIN					4
#define GPLL4						5
#define GCC_ADSS_PWM_CLK				6
#define GCC_ADSS_PWM_CLK_SRC				7
#define GCC_AHB_CLK					8
#define GCC_APSS_AXI_CLK_SRC				9
#define GCC_BLSP1_AHB_CLK				10
#define GCC_BLSP1_QUP1_I2C_APPS_CLK			11
#define GCC_BLSP1_QUP1_SPI_APPS_CLK			12
#define GCC_BLSP1_QUP1_SPI_APPS_CLK_SRC			13
#define GCC_BLSP1_QUP2_I2C_APPS_CLK			14
#define GCC_BLSP1_QUP2_SPI_APPS_CLK			15
#define GCC_BLSP1_QUP2_SPI_APPS_CLK_SRC			16
#define GCC_BLSP1_QUP3_I2C_APPS_CLK			17
#define GCC_BLSP1_QUP3_SPI_APPS_CLK			18
#define GCC_BLSP1_QUP3_SPI_APPS_CLK_SRC			19
#define GCC_BLSP1_SLEEP_CLK				20
#define GCC_BLSP1_UART1_APPS_CLK			21
#define GCC_BLSP1_UART1_APPS_CLK_SRC			22
#define GCC_BLSP1_UART2_APPS_CLK			23
#define GCC_BLSP1_UART2_APPS_CLK_SRC			24
#define GCC_BLSP1_UART3_APPS_CLK			25
#define GCC_BLSP1_UART3_APPS_CLK_SRC			26
#define GCC_CE_AHB_CLK					27
#define GCC_CE_AXI_CLK					28
#define GCC_CE_PCNOC_AHB_CLK				29
#define GCC_CMN_12GPLL_AHB_CLK				30
#define GCC_CMN_12GPLL_APU_CLK				31
#define GCC_CMN_12GPLL_SYS_CLK				32
#define GCC_GP1_CLK					33
#define GCC_GP1_CLK_SRC					34
#define GCC_GP2_CLK					35
#define GCC_GP2_CLK_SRC					36
#define GCC_LPASS_CORE_AXIM_CLK				37
#define GCC_LPASS_SWAY_CLK				38
#define GCC_LPASS_SWAY_CLK_SRC				39
#define GCC_MDIO_AHB_CLK				40
#define GCC_MDIO_SLAVE_AHB_CLK				41
#define GCC_MEM_NOC_Q6_AXI_CLK				42
#define GCC_MEM_NOC_TS_CLK				43
#define GCC_NSS_TS_CLK					44
#define GCC_NSS_TS_CLK_SRC				45
#define GCC_NSSCC_CLK					46
#define GCC_NSSCFG_CLK					47
#define GCC_NSSNOC_ATB_CLK				48
#define GCC_NSSNOC_NSSCC_CLK				49
#define GCC_NSSNOC_QOSGEN_REF_CLK			50
#define GCC_NSSNOC_SNOC_1_CLK				51
#define GCC_NSSNOC_SNOC_CLK				52
#define GCC_NSSNOC_TIMEOUT_REF_CLK			53
#define GCC_NSSNOC_XO_DCD_CLK				54
#define GCC_PCIE3X1_0_AHB_CLK				55
#define GCC_PCIE3X1_0_AUX_CLK				56
#define GCC_PCIE3X1_0_AXI_CLK_SRC			57
#define GCC_PCIE3X1_0_AXI_M_CLK				58
#define GCC_PCIE3X1_0_AXI_S_BRIDGE_CLK			59
#define GCC_PCIE3X1_0_AXI_S_CLK				60
#define GCC_PCIE3X1_0_PIPE_CLK				61
#define GCC_PCIE3X1_0_RCHG_CLK				62
#define GCC_PCIE3X1_0_RCHG_CLK_SRC			63
#define GCC_PCIE3X1_1_AHB_CLK				64
#define GCC_PCIE3X1_1_AUX_CLK				65
#define GCC_PCIE3X1_1_AXI_CLK_SRC			66
#define GCC_PCIE3X1_1_AXI_M_CLK				67
#define GCC_PCIE3X1_1_AXI_S_BRIDGE_CLK			68
#define GCC_PCIE3X1_1_AXI_S_CLK				69
#define GCC_PCIE3X1_1_PIPE_CLK				70
#define GCC_PCIE3X1_1_RCHG_CLK				71
#define GCC_PCIE3X1_1_RCHG_CLK_SRC			72
#define GCC_PCIE3X1_PHY_AHB_CLK				73
#define GCC_PCIE3X2_AHB_CLK				74
#define GCC_PCIE3X2_AUX_CLK				75
#define GCC_PCIE3X2_AXI_M_CLK				76
#define GCC_PCIE3X2_AXI_M_CLK_SRC			77
#define GCC_PCIE3X2_AXI_S_BRIDGE_CLK			78
#define GCC_PCIE3X2_AXI_S_CLK				79
#define GCC_PCIE3X2_AXI_S_CLK_SRC			80
#define GCC_PCIE3X2_PHY_AHB_CLK				81
#define GCC_PCIE3X2_PIPE_CLK				82
#define GCC_PCIE3X2_RCHG_CLK				83
#define GCC_PCIE3X2_RCHG_CLK_SRC			84
#define GCC_PCIE_AUX_CLK_SRC				85
#define GCC_PCNOC_AT_CLK				86

Annotation

Implementation Notes