include/dt-bindings/clock/qcom,ipq5424-cmn-pll.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,ipq5424-cmn-pll.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/qcom,ipq5424-cmn-pll.h- Extension
.h- Size
- 672 bytes
- Lines
- 23
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_QCOM_IPQ5424_CMN_PLL_H
#define _DT_BINDINGS_CLK_QCOM_IPQ5424_CMN_PLL_H
/* CMN PLL core clock. */
#define IPQ5424_CMN_PLL_CLK 0
/* The output clocks from CMN PLL of IPQ5424. */
#define IPQ5424_XO_24MHZ_CLK 1
#define IPQ5424_SLEEP_32KHZ_CLK 2
#define IPQ5424_PCS_31P25MHZ_CLK 3
#define IPQ5424_NSS_300MHZ_CLK 4
#define IPQ5424_PPE_375MHZ_CLK 5
#define IPQ5424_ETH0_50MHZ_CLK 6
#define IPQ5424_ETH1_50MHZ_CLK 7
#define IPQ5424_ETH2_50MHZ_CLK 8
#define IPQ5424_ETH_25MHZ_CLK 9
#endif
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.