include/dt-bindings/clock/qcom,ipq9574-gcc.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,ipq9574-gcc.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/qcom,ipq9574-gcc.h- Extension
.h- Size
- 7199 bytes
- Lines
- 207
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLOCK_IPQ_GCC_9574_H
#define _DT_BINDINGS_CLOCK_IPQ_GCC_9574_H
#define GPLL0_MAIN 0
#define GPLL0 1
#define GPLL2_MAIN 2
#define GPLL2 3
#define GPLL4_MAIN 4
#define GPLL4 5
#define GCC_SLEEP_CLK_SRC 6
#define APSS_AHB_CLK_SRC 7
#define APSS_AXI_CLK_SRC 8
#define BLSP1_QUP1_I2C_APPS_CLK_SRC 9
#define BLSP1_QUP1_SPI_APPS_CLK_SRC 10
#define BLSP1_QUP2_I2C_APPS_CLK_SRC 11
#define BLSP1_QUP2_SPI_APPS_CLK_SRC 12
#define BLSP1_QUP3_I2C_APPS_CLK_SRC 13
#define BLSP1_QUP3_SPI_APPS_CLK_SRC 14
#define BLSP1_QUP4_I2C_APPS_CLK_SRC 15
#define BLSP1_QUP4_SPI_APPS_CLK_SRC 16
#define BLSP1_QUP5_I2C_APPS_CLK_SRC 17
#define BLSP1_QUP5_SPI_APPS_CLK_SRC 18
#define BLSP1_QUP6_I2C_APPS_CLK_SRC 19
#define BLSP1_QUP6_SPI_APPS_CLK_SRC 20
#define BLSP1_UART1_APPS_CLK_SRC 21
#define BLSP1_UART2_APPS_CLK_SRC 22
#define BLSP1_UART3_APPS_CLK_SRC 23
#define BLSP1_UART4_APPS_CLK_SRC 24
#define BLSP1_UART5_APPS_CLK_SRC 25
#define BLSP1_UART6_APPS_CLK_SRC 26
#define GCC_APSS_AHB_CLK 27
#define GCC_APSS_AXI_CLK 28
#define GCC_BLSP1_QUP1_I2C_APPS_CLK 29
#define GCC_BLSP1_QUP1_SPI_APPS_CLK 30
#define GCC_BLSP1_QUP2_I2C_APPS_CLK 31
#define GCC_BLSP1_QUP2_SPI_APPS_CLK 32
#define GCC_BLSP1_QUP3_I2C_APPS_CLK 33
#define GCC_BLSP1_QUP3_SPI_APPS_CLK 34
#define GCC_BLSP1_QUP4_I2C_APPS_CLK 35
#define GCC_BLSP1_QUP4_SPI_APPS_CLK 36
#define GCC_BLSP1_QUP5_I2C_APPS_CLK 37
#define GCC_BLSP1_QUP5_SPI_APPS_CLK 38
#define GCC_BLSP1_QUP6_I2C_APPS_CLK 39
#define GCC_BLSP1_QUP6_SPI_APPS_CLK 40
#define GCC_BLSP1_UART1_APPS_CLK 41
#define GCC_BLSP1_UART2_APPS_CLK 42
#define GCC_BLSP1_UART3_APPS_CLK 43
#define GCC_BLSP1_UART4_APPS_CLK 44
#define GCC_BLSP1_UART5_APPS_CLK 45
#define GCC_BLSP1_UART6_APPS_CLK 46
#define PCIE0_AXI_M_CLK_SRC 47
#define GCC_PCIE0_AXI_M_CLK 48
#define PCIE1_AXI_M_CLK_SRC 49
#define GCC_PCIE1_AXI_M_CLK 50
#define PCIE2_AXI_M_CLK_SRC 51
#define GCC_PCIE2_AXI_M_CLK 52
#define PCIE3_AXI_M_CLK_SRC 53
#define GCC_PCIE3_AXI_M_CLK 54
#define PCIE0_AXI_S_CLK_SRC 55
#define GCC_PCIE0_AXI_S_BRIDGE_CLK 56
#define GCC_PCIE0_AXI_S_CLK 57
#define PCIE1_AXI_S_CLK_SRC 58
#define GCC_PCIE1_AXI_S_BRIDGE_CLK 59
#define GCC_PCIE1_AXI_S_CLK 60
#define PCIE2_AXI_S_CLK_SRC 61
#define GCC_PCIE2_AXI_S_BRIDGE_CLK 62
#define GCC_PCIE2_AXI_S_CLK 63
#define PCIE3_AXI_S_CLK_SRC 64
#define GCC_PCIE3_AXI_S_BRIDGE_CLK 65
#define GCC_PCIE3_AXI_S_CLK 66
#define PCIE0_PIPE_CLK_SRC 67
#define PCIE1_PIPE_CLK_SRC 68
#define PCIE2_PIPE_CLK_SRC 69
#define PCIE3_PIPE_CLK_SRC 70
#define PCIE_AUX_CLK_SRC 71
#define GCC_PCIE0_AUX_CLK 72
#define GCC_PCIE1_AUX_CLK 73
#define GCC_PCIE2_AUX_CLK 74
#define GCC_PCIE3_AUX_CLK 75
#define PCIE0_RCHNG_CLK_SRC 76
#define GCC_PCIE0_RCHNG_CLK 77
#define PCIE1_RCHNG_CLK_SRC 78
#define GCC_PCIE1_RCHNG_CLK 79
#define PCIE2_RCHNG_CLK_SRC 80
#define GCC_PCIE2_RCHNG_CLK 81
#define PCIE3_RCHNG_CLK_SRC 82
#define GCC_PCIE3_RCHNG_CLK 83
#define GCC_PCIE0_AHB_CLK 84
#define GCC_PCIE1_AHB_CLK 85
#define GCC_PCIE2_AHB_CLK 86
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.