include/dt-bindings/clock/qcom,mmcc-msm8960.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,mmcc-msm8960.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/qcom,mmcc-msm8960.h- Extension
.h- Size
- 3755 bytes
- Lines
- 140
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8960_H
#define _DT_BINDINGS_CLK_MSM_MMCC_8960_H
#define MMSS_AHB_SRC 0
#define FAB_AHB_CLK 1
#define APU_AHB_CLK 2
#define TV_ENC_AHB_CLK 3
#define AMP_AHB_CLK 4
#define DSI2_S_AHB_CLK 5
#define JPEGD_AHB_CLK 6
#define GFX2D0_AHB_CLK 7
#define DSI_S_AHB_CLK 8
#define DSI2_M_AHB_CLK 9
#define VPE_AHB_CLK 10
#define SMMU_AHB_CLK 11
#define HDMI_M_AHB_CLK 12
#define VFE_AHB_CLK 13
#define ROT_AHB_CLK 14
#define VCODEC_AHB_CLK 15
#define MDP_AHB_CLK 16
#define DSI_M_AHB_CLK 17
#define CSI_AHB_CLK 18
#define MMSS_IMEM_AHB_CLK 19
#define IJPEG_AHB_CLK 20
#define HDMI_S_AHB_CLK 21
#define GFX3D_AHB_CLK 22
#define GFX2D1_AHB_CLK 23
#define MMSS_FPB_CLK 24
#define MMSS_AXI_SRC 25
#define MMSS_FAB_CORE 26
#define FAB_MSP_AXI_CLK 27
#define JPEGD_AXI_CLK 28
#define GMEM_AXI_CLK 29
#define MDP_AXI_CLK 30
#define MMSS_IMEM_AXI_CLK 31
#define IJPEG_AXI_CLK 32
#define GFX3D_AXI_CLK 33
#define VCODEC_AXI_CLK 34
#define VFE_AXI_CLK 35
#define VPE_AXI_CLK 36
#define ROT_AXI_CLK 37
#define VCODEC_AXI_A_CLK 38
#define VCODEC_AXI_B_CLK 39
#define MM_AXI_S3_FCLK 40
#define MM_AXI_S2_FCLK 41
#define MM_AXI_S1_FCLK 42
#define MM_AXI_S0_FCLK 43
#define MM_AXI_S2_CLK 44
#define MM_AXI_S1_CLK 45
#define MM_AXI_S0_CLK 46
#define CSI0_SRC 47
#define CSI0_CLK 48
#define CSI0_PHY_CLK 49
#define CSI1_SRC 50
#define CSI1_CLK 51
#define CSI1_PHY_CLK 52
#define CSI2_SRC 53
#define CSI2_CLK 54
#define CSI2_PHY_CLK 55
#define DSI_SRC 56
#define DSI_CLK 57
#define CSI_PIX_CLK 58
#define CSI_RDI_CLK 59
#define MDP_VSYNC_CLK 60
#define HDMI_DIV_CLK 61
#define HDMI_APP_CLK 62
#define CSI_PIX1_CLK 63
#define CSI_RDI2_CLK 64
#define CSI_RDI1_CLK 65
#define GFX2D0_SRC 66
#define GFX2D0_CLK 67
#define GFX2D1_SRC 68
#define GFX2D1_CLK 69
#define GFX3D_SRC 70
#define GFX3D_CLK 71
#define IJPEG_SRC 72
#define IJPEG_CLK 73
#define JPEGD_SRC 74
#define JPEGD_CLK 75
#define MDP_SRC 76
#define MDP_CLK 77
#define MDP_LUT_CLK 78
#define DSI2_PIXEL_SRC 79
#define DSI2_PIXEL_CLK 80
#define DSI2_SRC 81
#define DSI2_CLK 82
#define DSI1_BYTE_SRC 83
#define DSI1_BYTE_CLK 84
#define DSI2_BYTE_SRC 85
#define DSI2_BYTE_CLK 86
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.