include/dt-bindings/clock/qcom,mmcc-msm8998.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,mmcc-msm8998.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/qcom,mmcc-msm8998.h
Extension
.h
Size
6228 bytes
Lines
211
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8998_H
#define _DT_BINDINGS_CLK_MSM_MMCC_8998_H

#define MMPLL0						0
#define MMPLL0_OUT_EVEN					1
#define MMPLL1						2
#define MMPLL1_OUT_EVEN					3
#define MMPLL3						4
#define MMPLL3_OUT_EVEN					5
#define MMPLL4						6
#define MMPLL4_OUT_EVEN					7
#define MMPLL5						8
#define MMPLL5_OUT_EVEN					9
#define MMPLL6						10
#define MMPLL6_OUT_EVEN					11
#define MMPLL7						12
#define MMPLL7_OUT_EVEN					13
#define MMPLL10						14
#define MMPLL10_OUT_EVEN				15
#define BYTE0_CLK_SRC					16
#define BYTE1_CLK_SRC					17
#define CCI_CLK_SRC					18
#define CPP_CLK_SRC					19
#define CSI0_CLK_SRC					20
#define CSI1_CLK_SRC					21
#define CSI2_CLK_SRC					22
#define CSI3_CLK_SRC					23
#define CSIPHY_CLK_SRC					24
#define CSI0PHYTIMER_CLK_SRC				25
#define CSI1PHYTIMER_CLK_SRC				26
#define CSI2PHYTIMER_CLK_SRC				27
#define DP_AUX_CLK_SRC					28
#define DP_CRYPTO_CLK_SRC				29
#define DP_LINK_CLK_SRC					30
#define DP_PIXEL_CLK_SRC				31
#define ESC0_CLK_SRC					32
#define ESC1_CLK_SRC					33
#define EXTPCLK_CLK_SRC					34
#define FD_CORE_CLK_SRC					35
#define HDMI_CLK_SRC					36
#define JPEG0_CLK_SRC					37
#define MAXI_CLK_SRC					38
#define MCLK0_CLK_SRC					39
#define MCLK1_CLK_SRC					40
#define MCLK2_CLK_SRC					41
#define MCLK3_CLK_SRC					42
#define MDP_CLK_SRC					43
#define VSYNC_CLK_SRC					44
#define AHB_CLK_SRC					45
#define AXI_CLK_SRC					46
#define PCLK0_CLK_SRC					47
#define PCLK1_CLK_SRC					48
#define ROT_CLK_SRC					49
#define VIDEO_CORE_CLK_SRC				50
#define VIDEO_SUBCORE0_CLK_SRC				51
#define VIDEO_SUBCORE1_CLK_SRC				52
#define VFE0_CLK_SRC					53
#define VFE1_CLK_SRC					54
#define MISC_AHB_CLK					55
#define VIDEO_CORE_CLK					56
#define VIDEO_AHB_CLK					57
#define VIDEO_AXI_CLK					58
#define VIDEO_MAXI_CLK					59
#define VIDEO_SUBCORE0_CLK				60
#define VIDEO_SUBCORE1_CLK				61
#define MDSS_AHB_CLK					62
#define MDSS_HDMI_DP_AHB_CLK				63
#define MDSS_AXI_CLK					64
#define MDSS_PCLK0_CLK					65
#define MDSS_PCLK1_CLK					66
#define MDSS_MDP_CLK					67
#define MDSS_MDP_LUT_CLK				68
#define MDSS_EXTPCLK_CLK				69
#define MDSS_VSYNC_CLK					70
#define MDSS_HDMI_CLK					71
#define MDSS_BYTE0_CLK					72
#define MDSS_BYTE1_CLK					73
#define MDSS_ESC0_CLK					74
#define MDSS_ESC1_CLK					75
#define MDSS_ROT_CLK					76
#define MDSS_DP_LINK_CLK				77
#define MDSS_DP_LINK_INTF_CLK				78
#define MDSS_DP_CRYPTO_CLK				79
#define MDSS_DP_PIXEL_CLK				80
#define MDSS_DP_AUX_CLK					81
#define MDSS_BYTE0_INTF_CLK				82
#define MDSS_BYTE1_INTF_CLK				83
#define CAMSS_CSI0PHYTIMER_CLK				84
#define CAMSS_CSI1PHYTIMER_CLK				85
#define CAMSS_CSI2PHYTIMER_CLK				86

Annotation

Implementation Notes