include/dt-bindings/clock/qcom,qcs615-gcc.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/qcom,qcs615-gcc.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/qcom,qcs615-gcc.h
Extension
.h
Size
8198 bytes
Lines
212
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_QCOM_GCC_QCS615_H
#define _DT_BINDINGS_CLK_QCOM_GCC_QCS615_H

/* GCC clocks */
#define GPLL0_OUT_AUX2_DIV					0
#define GPLL3_OUT_AUX2_DIV					1
#define GPLL0							2
#define GPLL3							3
#define GPLL4							4
#define GPLL6							5
#define GPLL6_OUT_MAIN						6
#define GPLL7							7
#define GPLL8							8
#define GPLL8_OUT_MAIN						9
#define GCC_AGGRE_UFS_PHY_AXI_CLK				10
#define GCC_AGGRE_USB2_SEC_AXI_CLK				11
#define GCC_AGGRE_USB3_PRIM_AXI_CLK				12
#define GCC_AHB2PHY_EAST_CLK					13
#define GCC_AHB2PHY_WEST_CLK					14
#define GCC_BOOT_ROM_AHB_CLK					15
#define GCC_CAMERA_AHB_CLK					16
#define GCC_CAMERA_HF_AXI_CLK					17
#define GCC_CAMERA_XO_CLK					18
#define GCC_CE1_AHB_CLK						19
#define GCC_CE1_AXI_CLK						20
#define GCC_CE1_CLK						21
#define GCC_CFG_NOC_USB2_SEC_AXI_CLK				22
#define GCC_CFG_NOC_USB3_PRIM_AXI_CLK				23
#define GCC_CPUSS_AHB_CLK					24
#define GCC_CPUSS_AHB_CLK_SRC					25
#define GCC_CPUSS_GNOC_CLK					26
#define GCC_DDRSS_GPU_AXI_CLK					27
#define GCC_DISP_AHB_CLK					28
#define GCC_DISP_GPLL0_DIV_CLK_SRC				29
#define GCC_DISP_HF_AXI_CLK					30
#define GCC_DISP_XO_CLK						31
#define GCC_EMAC_AXI_CLK					32
#define GCC_EMAC_PTP_CLK					33
#define GCC_EMAC_PTP_CLK_SRC					34
#define GCC_EMAC_RGMII_CLK					35
#define GCC_EMAC_RGMII_CLK_SRC					36
#define GCC_EMAC_SLV_AHB_CLK					37
#define GCC_GP1_CLK						38
#define GCC_GP1_CLK_SRC						39
#define GCC_GP2_CLK						40
#define GCC_GP2_CLK_SRC						41
#define GCC_GP3_CLK						42
#define GCC_GP3_CLK_SRC						43
#define GCC_GPU_CFG_AHB_CLK					44
#define GCC_GPU_GPLL0_CLK_SRC					45
#define GCC_GPU_GPLL0_DIV_CLK_SRC				46
#define GCC_GPU_IREF_CLK					47
#define GCC_GPU_MEMNOC_GFX_CLK					48
#define GCC_GPU_SNOC_DVM_GFX_CLK				49
#define GCC_PCIE0_PHY_REFGEN_CLK				50
#define GCC_PCIE_0_AUX_CLK					51
#define GCC_PCIE_0_AUX_CLK_SRC					52
#define GCC_PCIE_0_CFG_AHB_CLK					53
#define GCC_PCIE_0_CLKREF_CLK					54
#define GCC_PCIE_0_MSTR_AXI_CLK					55
#define GCC_PCIE_0_PIPE_CLK					56
#define GCC_PCIE_0_SLV_AXI_CLK					57
#define GCC_PCIE_0_SLV_Q2A_AXI_CLK				58
#define GCC_PCIE_PHY_AUX_CLK					59
#define GCC_PCIE_PHY_REFGEN_CLK_SRC				60
#define GCC_PDM2_CLK						61
#define GCC_PDM2_CLK_SRC					62
#define GCC_PDM_AHB_CLK						63
#define GCC_PDM_XO4_CLK						64
#define GCC_PRNG_AHB_CLK					65
#define GCC_QMIP_CAMERA_NRT_AHB_CLK				66
#define GCC_QMIP_DISP_AHB_CLK					67
#define GCC_QMIP_PCIE_AHB_CLK					68
#define GCC_QMIP_VIDEO_VCODEC_AHB_CLK				69
#define GCC_QSPI_CNOC_PERIPH_AHB_CLK				70
#define GCC_QSPI_CORE_CLK					71
#define GCC_QSPI_CORE_CLK_SRC					72
#define GCC_QUPV3_WRAP0_CORE_2X_CLK				73
#define GCC_QUPV3_WRAP0_CORE_CLK				74
#define GCC_QUPV3_WRAP0_S0_CLK					75
#define GCC_QUPV3_WRAP0_S0_CLK_SRC				76
#define GCC_QUPV3_WRAP0_S1_CLK					77
#define GCC_QUPV3_WRAP0_S1_CLK_SRC				78
#define GCC_QUPV3_WRAP0_S2_CLK					79
#define GCC_QUPV3_WRAP0_S2_CLK_SRC				80
#define GCC_QUPV3_WRAP0_S3_CLK					81
#define GCC_QUPV3_WRAP0_S3_CLK_SRC				82
#define GCC_QUPV3_WRAP0_S4_CLK					83
#define GCC_QUPV3_WRAP0_S4_CLK_SRC				84
#define GCC_QUPV3_WRAP0_S5_CLK					85

Annotation

Implementation Notes