include/dt-bindings/clock/r9a06g032-sysctrl.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/r9a06g032-sysctrl.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/r9a06g032-sysctrl.h
Extension
.h
Size
5130 bytes
Lines
150
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DT_BINDINGS_R9A06G032_SYSCTRL_H__
#define __DT_BINDINGS_R9A06G032_SYSCTRL_H__

#define R9A06G032_CLK_PLL_USB		1
#define R9A06G032_CLK_48		1	/* AKA CLK_PLL_USB */
#define R9A06G032_MSEBIS_CLK		3	/* AKA CLKOUT_D16 */
#define R9A06G032_MSEBIM_CLK		3	/* AKA CLKOUT_D16 */
#define R9A06G032_CLK_DDRPHY_PLLCLK	5	/* AKA CLKOUT_D1OR2 */
#define R9A06G032_CLK50			6	/* AKA CLKOUT_D20 */
#define R9A06G032_CLK25			7	/* AKA CLKOUT_D40 */
#define R9A06G032_CLK125		9	/* AKA CLKOUT_D8 */
#define R9A06G032_CLK_P5_PG1		17	/* AKA DIV_P5_PG */
#define R9A06G032_CLK_REF_SYNC		21	/* AKA DIV_REF_SYNC */
#define R9A06G032_CLK_25_PG4		26
#define R9A06G032_CLK_25_PG5		27
#define R9A06G032_CLK_25_PG6		28
#define R9A06G032_CLK_25_PG7		29
#define R9A06G032_CLK_25_PG8		30
#define R9A06G032_CLK_ADC		31
#define R9A06G032_CLK_ECAT100		32
#define R9A06G032_CLK_HSR100		33
#define R9A06G032_CLK_I2C0		34
#define R9A06G032_CLK_I2C1		35
#define R9A06G032_CLK_MII_REF		36
#define R9A06G032_CLK_NAND		37
#define R9A06G032_CLK_NOUSBP2_PG6	38
#define R9A06G032_CLK_P1_PG2		39
#define R9A06G032_CLK_P1_PG3		40
#define R9A06G032_CLK_P1_PG4		41
#define R9A06G032_CLK_P4_PG3		42
#define R9A06G032_CLK_P4_PG4		43
#define R9A06G032_CLK_P6_PG1		44
#define R9A06G032_CLK_P6_PG2		45
#define R9A06G032_CLK_P6_PG3		46
#define R9A06G032_CLK_P6_PG4		47
#define R9A06G032_CLK_PCI_USB		48
#define R9A06G032_CLK_QSPI0		49
#define R9A06G032_CLK_QSPI1		50
#define R9A06G032_CLK_RGMII_REF		51
#define R9A06G032_CLK_RMII_REF		52
#define R9A06G032_CLK_SDIO0		53
#define R9A06G032_CLK_SDIO1		54
#define R9A06G032_CLK_SERCOS100		55
#define R9A06G032_CLK_SLCD		56
#define R9A06G032_CLK_SPI0		57
#define R9A06G032_CLK_SPI1		58
#define R9A06G032_CLK_SPI2		59
#define R9A06G032_CLK_SPI3		60
#define R9A06G032_CLK_SPI4		61
#define R9A06G032_CLK_SPI5		62
#define R9A06G032_CLK_SWITCH		63
#define R9A06G032_HCLK_ECAT125		65
#define R9A06G032_HCLK_PINCONFIG	66
#define R9A06G032_HCLK_SERCOS		67
#define R9A06G032_HCLK_SGPIO2		68
#define R9A06G032_HCLK_SGPIO3		69
#define R9A06G032_HCLK_SGPIO4		70
#define R9A06G032_HCLK_TIMER0		71
#define R9A06G032_HCLK_TIMER1		72
#define R9A06G032_HCLK_USBF		73
#define R9A06G032_HCLK_USBH		74
#define R9A06G032_HCLK_USBPM		75
#define R9A06G032_CLK_48_PG_F		76
#define R9A06G032_CLK_48_PG4		77
#define R9A06G032_CLK_DDRPHY_PCLK	81	/* AKA CLK_REF_SYNC_D4 */
#define R9A06G032_CLK_FW		81	/* AKA CLK_REF_SYNC_D4 */
#define R9A06G032_CLK_CRYPTO		81	/* AKA CLK_REF_SYNC_D4 */
#define R9A06G032_CLK_WATCHDOG		82	/* AKA CLK_REF_SYNC_D8 */
#define R9A06G032_CLK_A7MP		84	/* AKA DIV_CA7 */
#define R9A06G032_HCLK_CAN0		85
#define R9A06G032_HCLK_CAN1		86
#define R9A06G032_HCLK_DELTASIGMA	87
#define R9A06G032_HCLK_PWMPTO		88
#define R9A06G032_HCLK_RSV		89
#define R9A06G032_HCLK_SGPIO0		90
#define R9A06G032_HCLK_SGPIO1		91
#define R9A06G032_RTOS_MDC		92
#define R9A06G032_CLK_CM3		93
#define R9A06G032_CLK_DDRC		94
#define R9A06G032_CLK_ECAT25		95
#define R9A06G032_CLK_HSR50		96
#define R9A06G032_CLK_HW_RTOS		97
#define R9A06G032_CLK_SERCOS50		98
#define R9A06G032_HCLK_ADC		99
#define R9A06G032_HCLK_CM3		100
#define R9A06G032_HCLK_CRYPTO_EIP150	101
#define R9A06G032_HCLK_CRYPTO_EIP93	102
#define R9A06G032_HCLK_DDRC		103
#define R9A06G032_HCLK_DMA0		104
#define R9A06G032_HCLK_DMA1		105

Annotation

Implementation Notes