include/dt-bindings/clock/r9a07g044-cpg.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/r9a07g044-cpg.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/r9a07g044-cpg.h
Extension
.h
Size
7231 bytes
Lines
221
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__
#define __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__

#include <dt-bindings/clock/renesas-cpg-mssr.h>

/* R9A07G044 CPG Core Clocks */
#define R9A07G044_CLK_I			0
#define R9A07G044_CLK_I2		1
#define R9A07G044_CLK_G			2
#define R9A07G044_CLK_S0		3
#define R9A07G044_CLK_S1		4
#define R9A07G044_CLK_SPI0		5
#define R9A07G044_CLK_SPI1		6
#define R9A07G044_CLK_SD0		7
#define R9A07G044_CLK_SD1		8
#define R9A07G044_CLK_M0		9
#define R9A07G044_CLK_M1		10
#define R9A07G044_CLK_M2		11
#define R9A07G044_CLK_M3		12
#define R9A07G044_CLK_M4		13
#define R9A07G044_CLK_HP		14
#define R9A07G044_CLK_TSU		15
#define R9A07G044_CLK_ZT		16
#define R9A07G044_CLK_P0		17
#define R9A07G044_CLK_P1		18
#define R9A07G044_CLK_P2		19
#define R9A07G044_CLK_AT		20
#define R9A07G044_OSCCLK		21
#define R9A07G044_CLK_P0_DIV2		22

/* R9A07G044 Module Clocks */
#define R9A07G044_CA55_SCLK		0
#define R9A07G044_CA55_PCLK		1
#define R9A07G044_CA55_ATCLK		2
#define R9A07G044_CA55_GICCLK		3
#define R9A07G044_CA55_PERICLK		4
#define R9A07G044_CA55_ACLK		5
#define R9A07G044_CA55_TSCLK		6
#define R9A07G044_GIC600_GICCLK		7
#define R9A07G044_IA55_CLK		8
#define R9A07G044_IA55_PCLK		9
#define R9A07G044_MHU_PCLK		10
#define R9A07G044_SYC_CNT_CLK		11
#define R9A07G044_DMAC_ACLK		12
#define R9A07G044_DMAC_PCLK		13
#define R9A07G044_OSTM0_PCLK		14
#define R9A07G044_OSTM1_PCLK		15
#define R9A07G044_OSTM2_PCLK		16
#define R9A07G044_MTU_X_MCK_MTU3	17
#define R9A07G044_POE3_CLKM_POE		18
#define R9A07G044_GPT_PCLK		19
#define R9A07G044_POEG_A_CLKP		20
#define R9A07G044_POEG_B_CLKP		21
#define R9A07G044_POEG_C_CLKP		22
#define R9A07G044_POEG_D_CLKP		23
#define R9A07G044_WDT0_PCLK		24
#define R9A07G044_WDT0_CLK		25
#define R9A07G044_WDT1_PCLK		26
#define R9A07G044_WDT1_CLK		27
#define R9A07G044_WDT2_PCLK		28
#define R9A07G044_WDT2_CLK		29
#define R9A07G044_SPI_CLK2		30
#define R9A07G044_SPI_CLK		31
#define R9A07G044_SDHI0_IMCLK		32
#define R9A07G044_SDHI0_IMCLK2		33
#define R9A07G044_SDHI0_CLK_HS		34
#define R9A07G044_SDHI0_ACLK		35
#define R9A07G044_SDHI1_IMCLK		36
#define R9A07G044_SDHI1_IMCLK2		37
#define R9A07G044_SDHI1_CLK_HS		38
#define R9A07G044_SDHI1_ACLK		39
#define R9A07G044_GPU_CLK		40
#define R9A07G044_GPU_AXI_CLK		41
#define R9A07G044_GPU_ACE_CLK		42
#define R9A07G044_ISU_ACLK		43
#define R9A07G044_ISU_PCLK		44
#define R9A07G044_H264_CLK_A		45
#define R9A07G044_H264_CLK_P		46
#define R9A07G044_CRU_SYSCLK		47
#define R9A07G044_CRU_VCLK		48
#define R9A07G044_CRU_PCLK		49
#define R9A07G044_CRU_ACLK		50
#define R9A07G044_MIPI_DSI_PLLCLK	51
#define R9A07G044_MIPI_DSI_SYSCLK	52
#define R9A07G044_MIPI_DSI_ACLK		53
#define R9A07G044_MIPI_DSI_PCLK		54
#define R9A07G044_MIPI_DSI_VCLK		55
#define R9A07G044_MIPI_DSI_LPCLK	56
#define R9A07G044_LCDC_CLK_A		57
#define R9A07G044_LCDC_CLK_P		58

Annotation

Implementation Notes