include/dt-bindings/clock/rk3128-cru.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/rk3128-cru.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/rk3128-cru.h- Extension
.h- Size
- 6245 bytes
- Lines
- 274
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H
/* core clocks */
#define PLL_APLL 1
#define PLL_DPLL 2
#define PLL_CPLL 3
#define PLL_GPLL 4
#define ARMCLK 5
#define PLL_GPLL_DIV2 6
#define PLL_GPLL_DIV3 7
/* sclk gates (special clocks) */
#define SCLK_SPI0 65
#define SCLK_NANDC 67
#define SCLK_SDMMC 68
#define SCLK_SDIO 69
#define SCLK_EMMC 71
#define SCLK_UART0 77
#define SCLK_UART1 78
#define SCLK_UART2 79
#define SCLK_I2S0 80
#define SCLK_I2S1 81
#define SCLK_SPDIF 83
#define SCLK_TIMER0 85
#define SCLK_TIMER1 86
#define SCLK_TIMER2 87
#define SCLK_TIMER3 88
#define SCLK_TIMER4 89
#define SCLK_TIMER5 90
#define SCLK_SARADC 91
#define SCLK_I2S_OUT 113
#define SCLK_SDMMC_DRV 114
#define SCLK_SDIO_DRV 115
#define SCLK_EMMC_DRV 117
#define SCLK_SDMMC_SAMPLE 118
#define SCLK_SDIO_SAMPLE 119
#define SCLK_EMMC_SAMPLE 121
#define SCLK_VOP 122
#define SCLK_MAC_SRC 124
#define SCLK_MAC 126
#define SCLK_MAC_REFOUT 127
#define SCLK_MAC_REF 128
#define SCLK_MAC_RX 129
#define SCLK_MAC_TX 130
#define SCLK_HEVC_CORE 134
#define SCLK_RGA 135
#define SCLK_CRYPTO 138
#define SCLK_TSP 139
#define SCLK_OTGPHY0 142
#define SCLK_OTGPHY1 143
#define SCLK_DDRC 144
#define SCLK_PVTM_FUNC 145
#define SCLK_PVTM_CORE 146
#define SCLK_PVTM_GPU 147
#define SCLK_MIPI_24M 148
#define SCLK_PVTM 149
#define SCLK_CIF_SRC 150
#define SCLK_CIF_OUT_SRC 151
#define SCLK_CIF_OUT 152
#define SCLK_SFC 153
#define SCLK_USB480M 154
/* dclk gates */
#define DCLK_VOP 190
#define DCLK_EBC 191
/* aclk gates */
#define ACLK_VIO0 192
#define ACLK_VIO1 193
#define ACLK_DMAC 194
#define ACLK_CPU 195
#define ACLK_VEPU 196
#define ACLK_VDPU 197
#define ACLK_CIF 198
#define ACLK_IEP 199
#define ACLK_LCDC0 204
#define ACLK_RGA 205
#define ACLK_PERI 210
#define ACLK_VOP 211
#define ACLK_GMAC 212
#define ACLK_GPU 213
/* pclk gates */
#define PCLK_SARADC 318
#define PCLK_WDT 319
#define PCLK_GPIO0 320
#define PCLK_GPIO1 321
#define PCLK_GPIO2 322
#define PCLK_GPIO3 323
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.