include/dt-bindings/clock/rk3308-cru.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/rk3308-cru.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/rk3308-cru.h- Extension
.h- Size
- 9345 bytes
- Lines
- 386
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H
/* core clocks */
#define PLL_APLL 1
#define PLL_DPLL 2
#define PLL_VPLL0 3
#define PLL_VPLL1 4
#define ARMCLK 5
/* sclk (special clocks) */
#define USB480M 14
#define SCLK_RTC32K 15
#define SCLK_PVTM_CORE 16
#define SCLK_UART0 17
#define SCLK_UART1 18
#define SCLK_UART2 19
#define SCLK_UART3 20
#define SCLK_UART4 21
#define SCLK_I2C0 22
#define SCLK_I2C1 23
#define SCLK_I2C2 24
#define SCLK_I2C3 25
#define SCLK_PWM0 26
#define SCLK_SPI0 27
#define SCLK_SPI1 28
#define SCLK_SPI2 29
#define SCLK_TIMER0 30
#define SCLK_TIMER1 31
#define SCLK_TIMER2 32
#define SCLK_TIMER3 33
#define SCLK_TIMER4 34
#define SCLK_TIMER5 35
#define SCLK_TSADC 36
#define SCLK_SARADC 37
#define SCLK_OTP 38
#define SCLK_OTP_USR 39
#define SCLK_CPU_BOOST 40
#define SCLK_CRYPTO 41
#define SCLK_CRYPTO_APK 42
#define SCLK_NANDC_DIV 43
#define SCLK_NANDC_DIV50 44
#define SCLK_NANDC 45
#define SCLK_SDMMC_DIV 46
#define SCLK_SDMMC_DIV50 47
#define SCLK_SDMMC 48
#define SCLK_SDMMC_DRV 49
#define SCLK_SDMMC_SAMPLE 50
#define SCLK_SDIO_DIV 51
#define SCLK_SDIO_DIV50 52
#define SCLK_SDIO 53
#define SCLK_SDIO_DRV 54
#define SCLK_SDIO_SAMPLE 55
#define SCLK_EMMC_DIV 56
#define SCLK_EMMC_DIV50 57
#define SCLK_EMMC 58
#define SCLK_EMMC_DRV 59
#define SCLK_EMMC_SAMPLE 60
#define SCLK_SFC 61
#define SCLK_OTG_ADP 62
#define SCLK_MAC_SRC 63
#define SCLK_MAC 64
#define SCLK_MAC_REF 65
#define SCLK_MAC_RX_TX 66
#define SCLK_MAC_RMII 67
#define SCLK_DDR_MON_TIMER 68
#define SCLK_DDR_MON 69
#define SCLK_DDRCLK 70
#define SCLK_PMU 71
#define SCLK_USBPHY_REF 72
#define SCLK_WIFI 73
#define SCLK_PVTM_PMU 74
#define SCLK_PDM 75
#define SCLK_I2S0_8CH_TX 76
#define SCLK_I2S0_8CH_TX_OUT 77
#define SCLK_I2S0_8CH_RX 78
#define SCLK_I2S0_8CH_RX_OUT 79
#define SCLK_I2S1_8CH_TX 80
#define SCLK_I2S1_8CH_TX_OUT 81
#define SCLK_I2S1_8CH_RX 82
#define SCLK_I2S1_8CH_RX_OUT 83
#define SCLK_I2S2_8CH_TX 84
#define SCLK_I2S2_8CH_TX_OUT 85
#define SCLK_I2S2_8CH_RX 86
#define SCLK_I2S2_8CH_RX_OUT 87
#define SCLK_I2S3_8CH_TX 88
#define SCLK_I2S3_8CH_TX_OUT 89
#define SCLK_I2S3_8CH_RX 90
#define SCLK_I2S3_8CH_RX_OUT 91
#define SCLK_I2S0_2CH 92
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.