include/dt-bindings/clock/rk3368-cru.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/rk3368-cru.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/rk3368-cru.h- Extension
.h- Size
- 9120 bytes
- Lines
- 384
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3368_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3368_H
/* core clocks */
#define PLL_APLLB 1
#define PLL_APLLL 2
#define PLL_DPLL 3
#define PLL_CPLL 4
#define PLL_GPLL 5
#define PLL_NPLL 6
#define ARMCLKB 7
#define ARMCLKL 8
/* sclk gates (special clocks) */
#define SCLK_GPU_CORE 64
#define SCLK_SPI0 65
#define SCLK_SPI1 66
#define SCLK_SPI2 67
#define SCLK_SDMMC 68
#define SCLK_SDIO0 69
#define SCLK_EMMC 71
#define SCLK_TSADC 72
#define SCLK_SARADC 73
#define SCLK_NANDC0 75
#define SCLK_UART0 77
#define SCLK_UART1 78
#define SCLK_UART2 79
#define SCLK_UART3 80
#define SCLK_UART4 81
#define SCLK_I2S_8CH 82
#define SCLK_SPDIF_8CH 83
#define SCLK_I2S_2CH 84
#define SCLK_TIMER00 85
#define SCLK_TIMER01 86
#define SCLK_TIMER02 87
#define SCLK_TIMER03 88
#define SCLK_TIMER04 89
#define SCLK_TIMER05 90
#define SCLK_OTGPHY0 93
#define SCLK_OTG_ADP 96
#define SCLK_HSICPHY480M 97
#define SCLK_HSICPHY12M 98
#define SCLK_MACREF 99
#define SCLK_VOP0_PWM 100
#define SCLK_MAC_RX 102
#define SCLK_MAC_TX 103
#define SCLK_EDP_24M 104
#define SCLK_EDP 105
#define SCLK_RGA 106
#define SCLK_ISP 107
#define SCLK_HDCP 108
#define SCLK_HDMI_HDCP 109
#define SCLK_HDMI_CEC 110
#define SCLK_HEVC_CABAC 111
#define SCLK_HEVC_CORE 112
#define SCLK_I2S_8CH_OUT 113
#define SCLK_SDMMC_DRV 114
#define SCLK_SDIO0_DRV 115
#define SCLK_EMMC_DRV 117
#define SCLK_SDMMC_SAMPLE 118
#define SCLK_SDIO0_SAMPLE 119
#define SCLK_EMMC_SAMPLE 121
#define SCLK_USBPHY480M 122
#define SCLK_PVTM_CORE 123
#define SCLK_PVTM_GPU 124
#define SCLK_PVTM_PMU 125
#define SCLK_SFC 126
#define SCLK_MAC 127
#define SCLK_MACREF_OUT 128
#define SCLK_MIPIDSI_24M 129
#define SCLK_TIMER10 133
#define SCLK_TIMER11 134
#define SCLK_TIMER12 135
#define SCLK_TIMER13 136
#define SCLK_TIMER14 137
#define SCLK_TIMER15 138
#define SCLK_VIP_OUT 139
#define DCLK_VOP 190
#define MCLK_CRYPTO 191
/* aclk gates */
#define ACLK_GPU_MEM 192
#define ACLK_GPU_CFG 193
#define ACLK_DMAC_BUS 194
#define ACLK_DMAC_PERI 195
#define ACLK_PERI_MMU 196
#define ACLK_GMAC 197
#define ACLK_VOP 198
#define ACLK_VOP_IEP 199
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.