include/dt-bindings/clock/rockchip,rk3588-cru.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/rockchip,rk3588-cru.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/rockchip,rk3588-cru.h
Extension
.h
Size
21390 bytes
Lines
766
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3588_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RK3588_H

/* cru-clocks indices */

#define PLL_B0PLL			0
#define PLL_B1PLL			1
#define PLL_LPLL			2
#define PLL_V0PLL			3
#define PLL_AUPLL			4
#define PLL_CPLL			5
#define PLL_GPLL			6
#define PLL_NPLL			7
#define PLL_PPLL			8
#define ARMCLK_L			9
#define ARMCLK_B01			10
#define ARMCLK_B23			11
#define PCLK_BIGCORE0_ROOT		12
#define PCLK_BIGCORE0_PVTM		13
#define PCLK_BIGCORE1_ROOT		14
#define PCLK_BIGCORE1_PVTM		15
#define PCLK_DSU_S_ROOT			16
#define PCLK_DSU_ROOT			17
#define PCLK_DSU_NS_ROOT		18
#define PCLK_LITCORE_PVTM		19
#define PCLK_DBG			20
#define PCLK_DSU			21
#define PCLK_S_DAPLITE			22
#define PCLK_M_DAPLITE			23
#define MBIST_MCLK_PDM1			24
#define MBIST_CLK_ACDCDIG		25
#define HCLK_I2S2_2CH			26
#define HCLK_I2S3_2CH			27
#define CLK_I2S2_2CH_SRC		28
#define CLK_I2S2_2CH_FRAC		29
#define CLK_I2S2_2CH			30
#define MCLK_I2S2_2CH			31
#define I2S2_2CH_MCLKOUT		32
#define CLK_DAC_ACDCDIG			33
#define CLK_I2S3_2CH_SRC		34
#define CLK_I2S3_2CH_FRAC		35
#define CLK_I2S3_2CH			36
#define MCLK_I2S3_2CH			37
#define I2S3_2CH_MCLKOUT		38
#define PCLK_ACDCDIG			39
#define HCLK_I2S0_8CH			40
#define CLK_I2S0_8CH_TX_SRC		41
#define CLK_I2S0_8CH_TX_FRAC		42
#define MCLK_I2S0_8CH_TX		43
#define CLK_I2S0_8CH_TX			44
#define CLK_I2S0_8CH_RX_SRC		45
#define CLK_I2S0_8CH_RX_FRAC		46
#define MCLK_I2S0_8CH_RX		47
#define CLK_I2S0_8CH_RX			48
#define I2S0_8CH_MCLKOUT		49
#define HCLK_PDM1			50
#define MCLK_PDM1			51
#define HCLK_AUDIO_ROOT			52
#define PCLK_AUDIO_ROOT			53
#define HCLK_SPDIF0			54
#define CLK_SPDIF0_SRC			55
#define CLK_SPDIF0_FRAC			56
#define MCLK_SPDIF0			57
#define CLK_SPDIF0			58
#define CLK_SPDIF1			59
#define HCLK_SPDIF1			60
#define CLK_SPDIF1_SRC			61
#define CLK_SPDIF1_FRAC			62
#define MCLK_SPDIF1			63
#define ACLK_AV1_ROOT			64
#define ACLK_AV1			65
#define PCLK_AV1_ROOT			66
#define PCLK_AV1			67
#define PCLK_MAILBOX0			68
#define PCLK_MAILBOX1			69
#define PCLK_MAILBOX2			70
#define PCLK_PMU2			71
#define PCLK_PMUCM0_INTMUX		72
#define PCLK_DDRCM0_INTMUX		73
#define PCLK_TOP			74
#define PCLK_PWM1			75
#define CLK_PWM1			76
#define CLK_PWM1_CAPTURE		77
#define PCLK_PWM2			78
#define CLK_PWM2			79
#define CLK_PWM2_CAPTURE		80
#define PCLK_PWM3			81
#define CLK_PWM3			82
#define CLK_PWM3_CAPTURE		83
#define PCLK_BUSTIMER0			84

Annotation

Implementation Notes