include/dt-bindings/clock/rockchip,rv1103b-cru.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/rockchip,rv1103b-cru.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/rockchip,rv1103b-cru.h- Extension
.h- Size
- 5575 bytes
- Lines
- 221
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1103B_H
#define _DT_BINDINGS_CLK_ROCKCHIP_RV1103B_H
#define PLL_GPLL 0
#define ARMCLK 1
#define PLL_DPLL 2
#define XIN_OSC0_HALF 3
#define CLK_GPLL_DIV24 4
#define CLK_GPLL_DIV12 5
#define CLK_GPLL_DIV6 6
#define CLK_GPLL_DIV4 7
#define CLK_GPLL_DIV3 8
#define CLK_GPLL_DIV2P5 9
#define CLK_GPLL_DIV2 10
#define CLK_UART0_SRC 11
#define CLK_UART1_SRC 12
#define CLK_UART2_SRC 13
#define CLK_UART0_FRAC 14
#define CLK_UART1_FRAC 15
#define CLK_UART2_FRAC 16
#define CLK_SAI_SRC 17
#define CLK_SAI_FRAC 18
#define LSCLK_NPU_SRC 19
#define CLK_NPU_SRC 20
#define ACLK_VEPU_SRC 21
#define CLK_VEPU_SRC 22
#define ACLK_VI_SRC 23
#define CLK_ISP_SRC 24
#define DCLK_VICAP 25
#define CCLK_EMMC 26
#define CCLK_SDMMC0 27
#define SCLK_SFC_2X 28
#define LSCLK_PERI_SRC 29
#define ACLK_PERI_SRC 30
#define HCLK_HPMCU 31
#define SCLK_UART0 32
#define SCLK_UART1 33
#define SCLK_UART2 34
#define CLK_I2C_PMU 35
#define CLK_I2C_PERI 36
#define CLK_SPI0 37
#define CLK_PWM0_SRC 38
#define CLK_PWM1 39
#define CLK_PWM2 40
#define DCLK_DECOM_SRC 41
#define CCLK_SDMMC1 42
#define CLK_CORE_CRYPTO 43
#define CLK_PKA_CRYPTO 44
#define CLK_CORE_RGA 45
#define MCLK_SAI_SRC 46
#define CLK_FREQ_PWM0_SRC 47
#define CLK_COUNTER_PWM0_SRC 48
#define PCLK_TOP_ROOT 49
#define CLK_REF_MIPI0 50
#define CLK_MIPI0_OUT2IO 51
#define CLK_REF_MIPI1 52
#define CLK_MIPI1_OUT2IO 53
#define MCLK_SAI_OUT2IO 54
#define ACLK_NPU_ROOT 55
#define HCLK_RKNN 56
#define ACLK_RKNN 57
#define LSCLK_VEPU_ROOT 58
#define HCLK_VEPU 59
#define ACLK_VEPU 60
#define CLK_CORE_VEPU 61
#define PCLK_IOC_VCCIO3 62
#define PCLK_ACODEC 63
#define PCLK_USBPHY 64
#define LSCLK_VI_100M 65
#define LSCLK_VI_ROOT 66
#define HCLK_ISP 67
#define ACLK_ISP 68
#define CLK_CORE_ISP 69
#define ACLK_VICAP 70
#define HCLK_VICAP 71
#define ISP0CLK_VICAP 72
#define PCLK_CSI2HOST0 73
#define PCLK_CSI2HOST1 74
#define HCLK_EMMC 75
#define HCLK_SFC 76
#define HCLK_SFC_XIP 77
#define HCLK_SDMMC0 78
#define PCLK_CSIPHY 79
#define PCLK_GPIO1 80
#define DBCLK_GPIO1 81
#define PCLK_IOC_VCCIO47 82
#define LSCLK_DDR_ROOT 83
#define CLK_TIMER_DDRMON 84
#define LSCLK_PMU_ROOT 85
#define PCLK_PMU 86
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.