include/dt-bindings/clock/samsung,exynos7870-cmu.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/samsung,exynos7870-cmu.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/samsung,exynos7870-cmu.h
Extension
.h
Size
12486 bytes
Lines
325
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLOCK_EXYNOS7870_H
#define _DT_BINDINGS_CLOCK_EXYNOS7870_H

/* CMU_MIF */
#define CLK_DOUT_MIF_APB				1
#define CLK_DOUT_MIF_BUSD				2
#define CLK_DOUT_MIF_CMU_DISPAUD_BUS			3
#define CLK_DOUT_MIF_CMU_DISPAUD_DECON_ECLK		4
#define CLK_DOUT_MIF_CMU_DISPAUD_DECON_VCLK		5
#define CLK_DOUT_MIF_CMU_FSYS_BUS			6
#define CLK_DOUT_MIF_CMU_FSYS_MMC0			7
#define CLK_DOUT_MIF_CMU_FSYS_MMC1			8
#define CLK_DOUT_MIF_CMU_FSYS_MMC2			9
#define CLK_DOUT_MIF_CMU_FSYS_USB20DRD_REFCLK		10
#define CLK_DOUT_MIF_CMU_G3D_SWITCH			11
#define CLK_DOUT_MIF_CMU_ISP_CAM			12
#define CLK_DOUT_MIF_CMU_ISP_ISP			13
#define CLK_DOUT_MIF_CMU_ISP_SENSOR0			14
#define CLK_DOUT_MIF_CMU_ISP_SENSOR1			15
#define CLK_DOUT_MIF_CMU_ISP_SENSOR2			16
#define CLK_DOUT_MIF_CMU_ISP_VRA			17
#define CLK_DOUT_MIF_CMU_MFCMSCL_MFC			18
#define CLK_DOUT_MIF_CMU_MFCMSCL_MSCL			19
#define CLK_DOUT_MIF_CMU_PERI_BUS			20
#define CLK_DOUT_MIF_CMU_PERI_SPI0			21
#define CLK_DOUT_MIF_CMU_PERI_SPI1			22
#define CLK_DOUT_MIF_CMU_PERI_SPI2			23
#define CLK_DOUT_MIF_CMU_PERI_SPI3			24
#define CLK_DOUT_MIF_CMU_PERI_SPI4			25
#define CLK_DOUT_MIF_CMU_PERI_UART0			26
#define CLK_DOUT_MIF_CMU_PERI_UART1			27
#define CLK_DOUT_MIF_CMU_PERI_UART2			28
#define CLK_DOUT_MIF_HSI2C				29
#define CLK_FOUT_MIF_BUS_PLL				30
#define CLK_FOUT_MIF_MEDIA_PLL				31
#define CLK_FOUT_MIF_MEM_PLL				32
#define CLK_GOUT_MIF_CMU_DISPAUD_BUS			33
#define CLK_GOUT_MIF_CMU_DISPAUD_DECON_ECLK		34
#define CLK_GOUT_MIF_CMU_DISPAUD_DECON_VCLK		35
#define CLK_GOUT_MIF_CMU_FSYS_BUS			36
#define CLK_GOUT_MIF_CMU_FSYS_MMC0			37
#define CLK_GOUT_MIF_CMU_FSYS_MMC1			38
#define CLK_GOUT_MIF_CMU_FSYS_MMC2			39
#define CLK_GOUT_MIF_CMU_FSYS_USB20DRD_REFCLK		40
#define CLK_GOUT_MIF_CMU_G3D_SWITCH			41
#define CLK_GOUT_MIF_CMU_ISP_CAM			42
#define CLK_GOUT_MIF_CMU_ISP_ISP			43
#define CLK_GOUT_MIF_CMU_ISP_SENSOR0			44
#define CLK_GOUT_MIF_CMU_ISP_SENSOR1			45
#define CLK_GOUT_MIF_CMU_ISP_SENSOR2			46
#define CLK_GOUT_MIF_CMU_ISP_VRA			47
#define CLK_GOUT_MIF_CMU_MFCMSCL_MFC			48
#define CLK_GOUT_MIF_CMU_MFCMSCL_MSCL			49
#define CLK_GOUT_MIF_CMU_PERI_BUS			50
#define CLK_GOUT_MIF_CMU_PERI_SPI0			51
#define CLK_GOUT_MIF_CMU_PERI_SPI1			52
#define CLK_GOUT_MIF_CMU_PERI_SPI2			53
#define CLK_GOUT_MIF_CMU_PERI_SPI3			54
#define CLK_GOUT_MIF_CMU_PERI_SPI4			55
#define CLK_GOUT_MIF_CMU_PERI_UART0			56
#define CLK_GOUT_MIF_CMU_PERI_UART1			57
#define CLK_GOUT_MIF_CMU_PERI_UART2			58
#define CLK_GOUT_MIF_CP_PCLK_HSI2C			59
#define CLK_GOUT_MIF_CP_PCLK_HSI2C_BAT_0		60
#define CLK_GOUT_MIF_CP_PCLK_HSI2C_BAT_1		61
#define CLK_GOUT_MIF_HSI2C_AP_PCLKM			62
#define CLK_GOUT_MIF_HSI2C_AP_PCLKS			63
#define CLK_GOUT_MIF_HSI2C_CP_PCLKM			64
#define CLK_GOUT_MIF_HSI2C_CP_PCLKS			65
#define CLK_GOUT_MIF_HSI2C_IPCLK			66
#define CLK_GOUT_MIF_HSI2C_ITCLK			67
#define CLK_GOUT_MIF_MUX_BUSD				68
#define CLK_GOUT_MIF_MUX_BUS_PLL			69
#define CLK_GOUT_MIF_MUX_BUS_PLL_CON			70
#define CLK_GOUT_MIF_MUX_CMU_DISPAUD_BUS		71
#define CLK_GOUT_MIF_MUX_CMU_DISPAUD_DECON_ECLK		72
#define CLK_GOUT_MIF_MUX_CMU_DISPAUD_DECON_VCLK		73
#define CLK_GOUT_MIF_MUX_CMU_FSYS_BUS			74
#define CLK_GOUT_MIF_MUX_CMU_FSYS_MMC0			75
#define CLK_GOUT_MIF_MUX_CMU_FSYS_MMC1			76
#define CLK_GOUT_MIF_MUX_CMU_FSYS_MMC2			77
#define CLK_GOUT_MIF_MUX_CMU_FSYS_USB20DRD_REFCLK	78
#define CLK_GOUT_MIF_MUX_CMU_ISP_CAM			79
#define CLK_GOUT_MIF_MUX_CMU_ISP_ISP			80
#define CLK_GOUT_MIF_MUX_CMU_ISP_SENSOR0		81
#define CLK_GOUT_MIF_MUX_CMU_ISP_SENSOR1		82
#define CLK_GOUT_MIF_MUX_CMU_ISP_SENSOR2		83
#define CLK_GOUT_MIF_MUX_CMU_ISP_VRA			84
#define CLK_GOUT_MIF_MUX_CMU_MFCMSCL_MFC		85
#define CLK_GOUT_MIF_MUX_CMU_MFCMSCL_MSCL		86

Annotation

Implementation Notes