include/dt-bindings/clock/samsung,exynos990.h

Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/samsung,exynos990.h

File Facts

System
Linux kernel
Corpus path
include/dt-bindings/clock/samsung,exynos990.h
Extension
.h
Size
16332 bytes
Lines
439
Domain
Repository Root And Misc
Bucket
include
Inferred role
Repository Root And Misc: implementation source
Status
source implementation candidate

Why This File Exists

Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _DT_BINDINGS_CLOCK_EXYNOS_990_H
#define _DT_BINDINGS_CLOCK_EXYNOS_990_H

/* CMU_TOP */
#define CLK_FOUT_SHARED0_PLL		1
#define CLK_FOUT_SHARED1_PLL		2
#define CLK_FOUT_SHARED2_PLL		3
#define CLK_FOUT_SHARED3_PLL		4
#define CLK_FOUT_SHARED4_PLL		5
#define CLK_FOUT_G3D_PLL		6
#define CLK_FOUT_MMC_PLL		7
#define CLK_MOUT_PLL_SHARED0		8
#define CLK_MOUT_PLL_SHARED1		9
#define CLK_MOUT_PLL_SHARED2		10
#define CLK_MOUT_PLL_SHARED3		11
#define CLK_MOUT_PLL_SHARED4		12
#define CLK_MOUT_PLL_MMC		13
#define CLK_MOUT_PLL_G3D		14
#define CLK_MOUT_CMU_APM_BUS		15
#define CLK_MOUT_CMU_AUD_CPU		16
#define CLK_MOUT_CMU_BUS0_BUS		17
#define CLK_MOUT_CMU_BUS1_BUS		18
#define CLK_MOUT_CMU_BUS1_SSS		19
#define CLK_MOUT_CMU_CIS_CLK0		20
#define CLK_MOUT_CMU_CIS_CLK1		21
#define CLK_MOUT_CMU_CIS_CLK2		22
#define CLK_MOUT_CMU_CIS_CLK3		23
#define CLK_MOUT_CMU_CIS_CLK4		24
#define CLK_MOUT_CMU_CIS_CLK5		25
#define CLK_MOUT_CMU_CMU_BOOST		26
#define CLK_MOUT_CMU_CORE_BUS		27
#define CLK_MOUT_CMU_CPUCL0_DBG_BUS	28
#define CLK_MOUT_CMU_CPUCL0_SWITCH	29
#define CLK_MOUT_CMU_CPUCL1_SWITCH	30
#define CLK_MOUT_CMU_CPUCL2_BUSP	31
#define CLK_MOUT_CMU_CPUCL2_SWITCH	32
#define CLK_MOUT_CMU_CSIS_BUS		33
#define CLK_MOUT_CMU_CSIS_OIS_MCU	34
#define CLK_MOUT_CMU_DNC_BUS		35
#define CLK_MOUT_CMU_DNC_BUSM		36
#define CLK_MOUT_CMU_DNS_BUS		37
#define CLK_MOUT_CMU_DPU		38
#define CLK_MOUT_CMU_DPU_ALT		39
#define CLK_MOUT_CMU_DSP_BUS		40
#define CLK_MOUT_CMU_G2D_G2D		41
#define CLK_MOUT_CMU_G2D_MSCL		42
#define CLK_MOUT_CMU_HPM		43
#define CLK_MOUT_CMU_HSI0_BUS		44
#define CLK_MOUT_CMU_HSI0_DPGTC		45
#define CLK_MOUT_CMU_HSI0_USB31DRD	46
#define CLK_MOUT_CMU_HSI0_USBDP_DEBUG	47
#define CLK_MOUT_CMU_HSI1_BUS		48
#define CLK_MOUT_CMU_HSI1_MMC_CARD	49
#define CLK_MOUT_CMU_HSI1_PCIE		50
#define CLK_MOUT_CMU_HSI1_UFS_CARD	51
#define CLK_MOUT_CMU_HSI1_UFS_EMBD	52
#define CLK_MOUT_CMU_HSI2_BUS		53
#define CLK_MOUT_CMU_HSI2_PCIE		54
#define CLK_MOUT_CMU_IPP_BUS		55
#define CLK_MOUT_CMU_ITP_BUS		56
#define CLK_MOUT_CMU_MCSC_BUS		57
#define CLK_MOUT_CMU_MCSC_GDC		58
#define CLK_MOUT_CMU_CMU_BOOST_CPU	59
#define CLK_MOUT_CMU_MFC0_MFC0		60
#define CLK_MOUT_CMU_MFC0_WFD		61
#define CLK_MOUT_CMU_MIF_BUSP		62
#define CLK_MOUT_CMU_MIF_SWITCH		63
#define CLK_MOUT_CMU_NPU_BUS		64
#define CLK_MOUT_CMU_PERIC0_BUS		65
#define CLK_MOUT_CMU_PERIC0_IP		66
#define CLK_MOUT_CMU_PERIC1_BUS		67
#define CLK_MOUT_CMU_PERIC1_IP		68
#define CLK_MOUT_CMU_PERIS_BUS		69
#define CLK_MOUT_CMU_SSP_BUS		70
#define CLK_MOUT_CMU_TNR_BUS		71
#define CLK_MOUT_CMU_VRA_BUS		72
#define CLK_DOUT_CMU_APM_BUS		73
#define CLK_DOUT_CMU_AUD_CPU		74
#define CLK_DOUT_CMU_BUS0_BUS		75
#define CLK_DOUT_CMU_BUS1_BUS		76
#define CLK_DOUT_CMU_BUS1_SSS		77
#define CLK_DOUT_CMU_CIS_CLK0		78
#define CLK_DOUT_CMU_CIS_CLK1		79
#define CLK_DOUT_CMU_CIS_CLK2		80
#define CLK_DOUT_CMU_CIS_CLK3		81
#define CLK_DOUT_CMU_CIS_CLK4		82
#define CLK_DOUT_CMU_CIS_CLK5		83
#define CLK_DOUT_CMU_CMU_BOOST		84
#define CLK_DOUT_CMU_CORE_BUS		85
#define CLK_DOUT_CMU_CPUCL0_DBG_BUS	86

Annotation

Implementation Notes