include/dt-bindings/clock/spacemit,k3-clocks.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/spacemit,k3-clocks.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/spacemit,k3-clocks.h- Extension
.h- Size
- 13734 bytes
- Lines
- 391
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLOCK_SPACEMIT_K3_CLOCKS_H_
#define _DT_BINDINGS_CLOCK_SPACEMIT_K3_CLOCKS_H_
/* APBS (PLL) clocks */
#define CLK_PLL1 0
#define CLK_PLL2 1
#define CLK_PLL3 2
#define CLK_PLL4 3
#define CLK_PLL5 4
#define CLK_PLL6 5
#define CLK_PLL7 6
#define CLK_PLL8 7
#define CLK_PLL1_D2 8
#define CLK_PLL1_D3 9
#define CLK_PLL1_D4 10
#define CLK_PLL1_D5 11
#define CLK_PLL1_D6 12
#define CLK_PLL1_D7 13
#define CLK_PLL1_D8 14
#define CLK_PLL1_DX 15
#define CLK_PLL1_D64 16
#define CLK_PLL1_D10_AUD 17
#define CLK_PLL1_D100_AUD 18
#define CLK_PLL2_D1 19
#define CLK_PLL2_D2 20
#define CLK_PLL2_D3 21
#define CLK_PLL2_D4 22
#define CLK_PLL2_D5 23
#define CLK_PLL2_D6 24
#define CLK_PLL2_D7 25
#define CLK_PLL2_D8 26
#define CLK_PLL2_66 27
#define CLK_PLL2_33 28
#define CLK_PLL2_50 29
#define CLK_PLL2_25 30
#define CLK_PLL2_20 31
#define CLK_PLL2_D24_125 32
#define CLK_PLL2_D120_25 33
#define CLK_PLL3_D1 34
#define CLK_PLL3_D2 35
#define CLK_PLL3_D3 36
#define CLK_PLL3_D4 37
#define CLK_PLL3_D5 38
#define CLK_PLL3_D6 39
#define CLK_PLL3_D7 40
#define CLK_PLL3_D8 41
#define CLK_PLL4_D1 42
#define CLK_PLL4_D2 43
#define CLK_PLL4_D3 44
#define CLK_PLL4_D4 45
#define CLK_PLL4_D5 46
#define CLK_PLL4_D6 47
#define CLK_PLL4_D7 48
#define CLK_PLL4_D8 49
#define CLK_PLL5_D1 50
#define CLK_PLL5_D2 51
#define CLK_PLL5_D3 52
#define CLK_PLL5_D4 53
#define CLK_PLL5_D5 54
#define CLK_PLL5_D6 55
#define CLK_PLL5_D7 56
#define CLK_PLL5_D8 57
#define CLK_PLL6_D1 58
#define CLK_PLL6_D2 59
#define CLK_PLL6_D3 60
#define CLK_PLL6_D4 61
#define CLK_PLL6_D5 62
#define CLK_PLL6_D6 63
#define CLK_PLL6_D7 64
#define CLK_PLL6_D8 65
#define CLK_PLL6_80 66
#define CLK_PLL6_40 67
#define CLK_PLL6_20 68
#define CLK_PLL7_D1 69
#define CLK_PLL7_D2 70
#define CLK_PLL7_D3 71
#define CLK_PLL7_D4 72
#define CLK_PLL7_D5 73
#define CLK_PLL7_D6 74
#define CLK_PLL7_D7 75
#define CLK_PLL7_D8 76
#define CLK_PLL8_D1 77
#define CLK_PLL8_D2 78
#define CLK_PLL8_D3 79
#define CLK_PLL8_D4 80
#define CLK_PLL8_D5 81
#define CLK_PLL8_D6 82
#define CLK_PLL8_D7 83
#define CLK_PLL8_D8 84
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.