include/dt-bindings/clock/sun4i-a10-ccu.h
Source file repositories/reference/linux-study-clean/include/dt-bindings/clock/sun4i-a10-ccu.h
File Facts
- System
- Linux kernel
- Corpus path
include/dt-bindings/clock/sun4i-a10-ccu.h- Extension
.h- Size
- 5774 bytes
- Lines
- 203
- Domain
- Repository Root And Misc
- Bucket
- include
- Inferred role
- Repository Root And Misc: implementation source
- Status
- source implementation candidate
Why This File Exists
Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
- Top-level or miscellaneous repository surface. Use this as map coverage unless a later manual pass promotes the file into a deeper subsystem dossier.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _DT_BINDINGS_CLK_SUN4I_A10_H_
#define _DT_BINDINGS_CLK_SUN4I_A10_H_
#define CLK_HOSC 1
#define CLK_PLL_VIDEO0_2X 9
#define CLK_PLL_VIDEO1_2X 18
#define CLK_CPU 20
/* AHB Gates */
#define CLK_AHB_OTG 26
#define CLK_AHB_EHCI0 27
#define CLK_AHB_OHCI0 28
#define CLK_AHB_EHCI1 29
#define CLK_AHB_OHCI1 30
#define CLK_AHB_SS 31
#define CLK_AHB_DMA 32
#define CLK_AHB_BIST 33
#define CLK_AHB_MMC0 34
#define CLK_AHB_MMC1 35
#define CLK_AHB_MMC2 36
#define CLK_AHB_MMC3 37
#define CLK_AHB_MS 38
#define CLK_AHB_NAND 39
#define CLK_AHB_SDRAM 40
#define CLK_AHB_ACE 41
#define CLK_AHB_EMAC 42
#define CLK_AHB_TS 43
#define CLK_AHB_SPI0 44
#define CLK_AHB_SPI1 45
#define CLK_AHB_SPI2 46
#define CLK_AHB_SPI3 47
#define CLK_AHB_PATA 48
#define CLK_AHB_SATA 49
#define CLK_AHB_GPS 50
#define CLK_AHB_HSTIMER 51
#define CLK_AHB_VE 52
#define CLK_AHB_TVD 53
#define CLK_AHB_TVE0 54
#define CLK_AHB_TVE1 55
#define CLK_AHB_LCD0 56
#define CLK_AHB_LCD1 57
#define CLK_AHB_CSI0 58
#define CLK_AHB_CSI1 59
#define CLK_AHB_HDMI0 60
#define CLK_AHB_HDMI1 61
#define CLK_AHB_DE_BE0 62
#define CLK_AHB_DE_BE1 63
#define CLK_AHB_DE_FE0 64
#define CLK_AHB_DE_FE1 65
#define CLK_AHB_GMAC 66
#define CLK_AHB_MP 67
#define CLK_AHB_GPU 68
/* APB0 Gates */
#define CLK_APB0_CODEC 69
#define CLK_APB0_SPDIF 70
#define CLK_APB0_I2S0 71
#define CLK_APB0_AC97 72
#define CLK_APB0_I2S1 73
#define CLK_APB0_PIO 74
#define CLK_APB0_IR0 75
#define CLK_APB0_IR1 76
#define CLK_APB0_I2S2 77
#define CLK_APB0_KEYPAD 78
/* APB1 Gates */
#define CLK_APB1_I2C0 79
#define CLK_APB1_I2C1 80
#define CLK_APB1_I2C2 81
#define CLK_APB1_I2C3 82
#define CLK_APB1_CAN 83
#define CLK_APB1_SCR 84
#define CLK_APB1_PS20 85
#define CLK_APB1_PS21 86
#define CLK_APB1_I2C4 87
#define CLK_APB1_UART0 88
#define CLK_APB1_UART1 89
#define CLK_APB1_UART2 90
#define CLK_APB1_UART3 91
#define CLK_APB1_UART4 92
#define CLK_APB1_UART5 93
#define CLK_APB1_UART6 94
#define CLK_APB1_UART7 95
/* IP clocks */
#define CLK_NAND 96
#define CLK_MS 97
#define CLK_MMC0 98
#define CLK_MMC0_OUTPUT 99
#define CLK_MMC0_SAMPLE 100
Annotation
- Atlas domain: Repository Root And Misc / include.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.